core_regs          23 arch/arm/mach-mediatek/platsmp.c 	unsigned int core_regs[MTK_MAX_CPU - 1];
core_regs          70 arch/arm/mach-mediatek/platsmp.c 		mtk_smp_base + mtk_smp_info->core_regs[cpu-1]);
core_regs         259 drivers/gpu/drm/v3d/v3d_drv.c 	ret = map_regs(v3d, &v3d->core_regs[0], "core0");
core_regs          53 drivers/gpu/drm/v3d/v3d_drv.h 	void __iomem *core_regs[3];
core_regs         180 drivers/gpu/drm/v3d/v3d_drv.h #define V3D_CORE_READ(core, offset) readl(v3d->core_regs[core] + offset)
core_regs         181 drivers/gpu/drm/v3d/v3d_drv.h #define V3D_CORE_WRITE(core, offset, val) writel(val, v3d->core_regs[core] + offset)
core_regs          28 drivers/input/touchscreen/fsl-imx25-tcq.c 	struct regmap *core_regs;
core_regs         103 drivers/input/touchscreen/fsl-imx25-tcq.c 	regmap_write(priv->core_regs, MX25_TSC_TICR, precharge_cfg);
core_regs         137 drivers/input/touchscreen/fsl-imx25-tcq.c 	regmap_write(priv->core_regs, MX25_TSC_TICR, touch_detect_cfg |
core_regs         217 drivers/input/touchscreen/fsl-imx25-tcq.c 	regmap_write(priv->core_regs, MX25_TSC_TICR, MX25_PRECHARGE_VALUE);
core_regs         223 drivers/input/touchscreen/fsl-imx25-tcq.c 	regmap_write(priv->core_regs, MX25_TSC_TICR,
core_regs         378 drivers/input/touchscreen/fsl-imx25-tcq.c 	regmap_read(priv->core_regs, MX25_TSC_TGCR, &tgcr);
core_regs         409 drivers/input/touchscreen/fsl-imx25-tcq.c 	regmap_update_bits(priv->core_regs, MX25_TSC_TGCR,
core_regs         414 drivers/input/touchscreen/fsl-imx25-tcq.c 	regmap_update_bits(priv->core_regs, MX25_TSC_TGCR, MX25_TGCR_PDBEN,
core_regs         416 drivers/input/touchscreen/fsl-imx25-tcq.c 	regmap_update_bits(priv->core_regs, MX25_TSC_TGCR, MX25_TGCR_PDEN,
core_regs         550 drivers/input/touchscreen/fsl-imx25-tcq.c 	priv->core_regs = tsadc->regs;
core_regs         551 drivers/input/touchscreen/fsl-imx25-tcq.c 	if (!priv->core_regs)