controller_base 138 drivers/pci/controller/dwc/pcie-al.c void __iomem *controller_base; /* base of PCIe unit (not DW core) */ controller_base 152 drivers/pci/controller/dwc/pcie-al.c return readl_relaxed(pcie->controller_base + offset); controller_base 158 drivers/pci/controller/dwc/pcie-al.c writel_relaxed(val, pcie->controller_base + offset); controller_base 425 drivers/pci/controller/dwc/pcie-al.c al_pcie->controller_base = devm_ioremap_resource(dev, controller_res); controller_base 426 drivers/pci/controller/dwc/pcie-al.c if (IS_ERR(al_pcie->controller_base)) { controller_base 429 drivers/pci/controller/dwc/pcie-al.c return PTR_ERR(al_pcie->controller_base); controller_base 650 drivers/thermal/mtk_thermal.c void __iomem *controller_base = mt->thermal_base + offset; controller_base 658 drivers/thermal/mtk_thermal.c writel(TEMP_MONCTL1_PERIOD_UNIT(12), controller_base + TEMP_MONCTL1); controller_base 666 drivers/thermal/mtk_thermal.c controller_base + TEMP_MONCTL2); controller_base 670 drivers/thermal/mtk_thermal.c controller_base + TEMP_AHBPOLL); controller_base 673 drivers/thermal/mtk_thermal.c writel(0x0, controller_base + TEMP_MSRCTL0); controller_base 676 drivers/thermal/mtk_thermal.c writel(0xffffffff, controller_base + TEMP_AHBTO); controller_base 679 drivers/thermal/mtk_thermal.c writel(0x0, controller_base + TEMP_MONIDET0); controller_base 680 drivers/thermal/mtk_thermal.c writel(0x0, controller_base + TEMP_MONIDET1); controller_base 695 drivers/thermal/mtk_thermal.c writel(BIT(conf->auxadc_channel), controller_base + TEMP_ADCMUX); controller_base 699 drivers/thermal/mtk_thermal.c controller_base + TEMP_ADCMUXADDR); controller_base 703 drivers/thermal/mtk_thermal.c controller_base + TEMP_PNPMUXADDR); controller_base 706 drivers/thermal/mtk_thermal.c writel(BIT(conf->auxadc_channel), controller_base + TEMP_ADCEN); controller_base 710 drivers/thermal/mtk_thermal.c controller_base + TEMP_ADCENADDR); controller_base 714 drivers/thermal/mtk_thermal.c controller_base + TEMP_ADCVALIDADDR); controller_base 718 drivers/thermal/mtk_thermal.c controller_base + TEMP_ADCVOLTADDR); controller_base 721 drivers/thermal/mtk_thermal.c writel(0x0, controller_base + TEMP_RDCTRL); controller_base 725 drivers/thermal/mtk_thermal.c controller_base + TEMP_ADCVALIDMASK); controller_base 728 drivers/thermal/mtk_thermal.c writel(0x0, controller_base + TEMP_ADCVOLTAGESHIFT); controller_base 732 drivers/thermal/mtk_thermal.c controller_base + TEMP_ADCWRITECTRL); controller_base 740 drivers/thermal/mtk_thermal.c controller_base + TEMP_MONCTL0); controller_base 744 drivers/thermal/mtk_thermal.c controller_base + TEMP_ADCWRITECTRL);