control0 944 drivers/crypto/inside-secure/safexcel.c cdesc->control_data.control0 = CONTEXT_CONTROL_INV_TR; control0 335 drivers/crypto/inside-secure/safexcel.h u32 control0; control0 533 drivers/crypto/inside-secure/safexcel.h u32 control0; control0 421 drivers/crypto/inside-secure/safexcel_cipher.c cdesc->control_data.control0 = control0 428 drivers/crypto/inside-secure/safexcel_cipher.c cdesc->control_data.control0 = control0 435 drivers/crypto/inside-secure/safexcel_cipher.c cdesc->control_data.control0 |= control0 441 drivers/crypto/inside-secure/safexcel_cipher.c cdesc->control_data.control0 |= control0 447 drivers/crypto/inside-secure/safexcel_cipher.c cdesc->control_data.control0 = control0 452 drivers/crypto/inside-secure/safexcel_cipher.c cdesc->control_data.control0 = control0 459 drivers/crypto/inside-secure/safexcel_cipher.c cdesc->control_data.control0 |= control0 462 drivers/crypto/inside-secure/safexcel_cipher.c cdesc->control_data.control0 |= control0 467 drivers/crypto/inside-secure/safexcel_cipher.c cdesc->control_data.control0 |= control0 471 drivers/crypto/inside-secure/safexcel_cipher.c cdesc->control_data.control0 |= control0 475 drivers/crypto/inside-secure/safexcel_cipher.c cdesc->control_data.control0 |= control0 85 drivers/crypto/inside-secure/safexcel_hash.c cdesc->control_data.control0 |= ctx->alg; control0 95 drivers/crypto/inside-secure/safexcel_hash.c cdesc->control_data.control0 |= control0 101 drivers/crypto/inside-secure/safexcel_hash.c cdesc->control_data.control0 |= control0 138 drivers/crypto/inside-secure/safexcel_hash.c cdesc->control_data.control0 |= control0 144 drivers/crypto/inside-secure/safexcel_hash.c cdesc->control_data.control0 |= control0 160 drivers/crypto/inside-secure/safexcel_hash.c cdesc->control_data.control0 |= control0 166 drivers/crypto/inside-secure/safexcel_hash.c cdesc->control_data.control0 |= control0 48 drivers/crypto/mxs-dcp.c uint32_t control0; control0 237 drivers/crypto/mxs-dcp.c desc->control0 = MXS_DCP_CONTROL0_DECR_SEMAPHORE | control0 242 drivers/crypto/mxs-dcp.c desc->control0 |= MXS_DCP_CONTROL0_PAYLOAD_KEY; control0 245 drivers/crypto/mxs-dcp.c desc->control0 |= MXS_DCP_CONTROL0_CIPHER_ENCRYPT; control0 247 drivers/crypto/mxs-dcp.c desc->control0 |= MXS_DCP_CONTROL0_CIPHER_INIT; control0 569 drivers/crypto/mxs-dcp.c desc->control0 = MXS_DCP_CONTROL0_DECR_SEMAPHORE | control0 573 drivers/crypto/mxs-dcp.c desc->control0 |= MXS_DCP_CONTROL0_HASH_INIT; control0 600 drivers/crypto/mxs-dcp.c desc->control0 |= MXS_DCP_CONTROL0_HASH_TERM; control0 160 drivers/gpu/drm/i2c/sil164_drv.c uint8_t control0 = sil164_read(client, SIL164_CONTROL0); control0 163 drivers/gpu/drm/i2c/sil164_drv.c control0 |= SIL164_CONTROL0_POWER_ON; control0 165 drivers/gpu/drm/i2c/sil164_drv.c control0 &= ~SIL164_CONTROL0_POWER_ON; control0 167 drivers/gpu/drm/i2c/sil164_drv.c sil164_write(client, SIL164_CONTROL0, control0); control0 207 drivers/net/wireless/broadcom/b43/dma.c desc->dma64.control0 = cpu_to_le32(ctl0); control0 144 drivers/net/wireless/broadcom/b43/dma.h __le32 control0; control0 751 drivers/scsi/gdth.h u8 control0; /* control0 register(unused) */ control0 44 drivers/video/fbdev/vt8500lcdfb.c unsigned long control0; control0 112 drivers/video/fbdev/vt8500lcdfb.c control0 = readl(fbi->regbase) & ~0xf; control0 127 drivers/video/fbdev/vt8500lcdfb.c writel(control0 | (reg_bpp << 1) | 0x100, fbi->regbase); control0 206 include/linux/amba/pl080.h u32 control0; control0 213 include/linux/amba/pl080.h u32 control0;