config_base       200 arch/alpha/kernel/perf_event.c 	event[0]->hw.config_base = config;
config_base       203 arch/alpha/kernel/perf_event.c 		event[1]->hw.config_base = config;
config_base       424 arch/alpha/kernel/perf_event.c 	cpuc->config = cpuc->event[0]->hw.config_base;
config_base       663 arch/alpha/kernel/perf_event.c 	hwc->config_base = 0;
config_base       282 arch/arm/kernel/perf_event_v6.c 		evt	= (hwc->config_base << ARMV6_PMCR_EVT_COUNT0_SHIFT) |
config_base       286 arch/arm/kernel/perf_event_v6.c 		evt	= (hwc->config_base << ARMV6_PMCR_EVT_COUNT1_SHIFT) |
config_base       393 arch/arm/kernel/perf_event_v6.c 	if (ARMV6_PERFCTR_CPU_CYCLES == hwc->config_base) {
config_base       902 arch/arm/kernel/perf_event_v7.c 		armv7_pmnc_write_evtsel(idx, hwc->config_base);
config_base      1038 arch/arm/kernel/perf_event_v7.c 	unsigned long evtype = hwc->config_base & ARMV7_EVTYPE_EVENT;
config_base      1073 arch/arm/kernel/perf_event_v7.c 	unsigned long config_base = 0;
config_base      1078 arch/arm/kernel/perf_event_v7.c 		config_base |= ARMV7_EXCLUDE_USER;
config_base      1080 arch/arm/kernel/perf_event_v7.c 		config_base |= ARMV7_EXCLUDE_PL1;
config_base      1082 arch/arm/kernel/perf_event_v7.c 		config_base |= ARMV7_INCLUDE_HYP;
config_base      1088 arch/arm/kernel/perf_event_v7.c 	event->config_base = config_base;
config_base      1415 arch/arm/kernel/perf_event_v7.c static void krait_evt_setup(int idx, u32 config_base)
config_base      1420 arch/arm/kernel/perf_event_v7.c 	unsigned int region = EVENT_REGION(config_base);
config_base      1421 arch/arm/kernel/perf_event_v7.c 	unsigned int group = EVENT_GROUP(config_base);
config_base      1422 arch/arm/kernel/perf_event_v7.c 	unsigned int code = EVENT_CODE(config_base);
config_base      1424 arch/arm/kernel/perf_event_v7.c 	bool venum_event = EVENT_VENUM(config_base);
config_base      1436 arch/arm/kernel/perf_event_v7.c 	val |= config_base & (ARMV7_EXCLUDE_USER | ARMV7_EXCLUDE_PL1);
config_base      1472 arch/arm/kernel/perf_event_v7.c static void krait_clearpmu(u32 config_base)
config_base      1476 arch/arm/kernel/perf_event_v7.c 	unsigned int region = EVENT_REGION(config_base);
config_base      1477 arch/arm/kernel/perf_event_v7.c 	unsigned int group = EVENT_GROUP(config_base);
config_base      1478 arch/arm/kernel/perf_event_v7.c 	bool venum_event = EVENT_VENUM(config_base);
config_base      1510 arch/arm/kernel/perf_event_v7.c 	if (hwc->config_base & KRAIT_EVENT_MASK)
config_base      1511 arch/arm/kernel/perf_event_v7.c 		krait_clearpmu(hwc->config_base);
config_base      1541 arch/arm/kernel/perf_event_v7.c 	if (hwc->config_base & KRAIT_EVENT_MASK)
config_base      1542 arch/arm/kernel/perf_event_v7.c 		krait_evt_setup(idx, hwc->config_base);
config_base      1544 arch/arm/kernel/perf_event_v7.c 		armv7_pmnc_write_evtsel(idx, hwc->config_base);
config_base      1587 arch/arm/kernel/perf_event_v7.c 	if (hwc->config_base & VENUM_EVENT)
config_base      1612 arch/arm/kernel/perf_event_v7.c 	unsigned int region = EVENT_REGION(hwc->config_base);
config_base      1613 arch/arm/kernel/perf_event_v7.c 	unsigned int code = EVENT_CODE(hwc->config_base);
config_base      1614 arch/arm/kernel/perf_event_v7.c 	unsigned int group = EVENT_GROUP(hwc->config_base);
config_base      1615 arch/arm/kernel/perf_event_v7.c 	bool venum_event = EVENT_VENUM(hwc->config_base);
config_base      1616 arch/arm/kernel/perf_event_v7.c 	bool krait_event = EVENT_CPU(hwc->config_base);
config_base      1642 arch/arm/kernel/perf_event_v7.c 	unsigned int region = EVENT_REGION(hwc->config_base);
config_base      1643 arch/arm/kernel/perf_event_v7.c 	unsigned int group = EVENT_GROUP(hwc->config_base);
config_base      1644 arch/arm/kernel/perf_event_v7.c 	bool venum_event = EVENT_VENUM(hwc->config_base);
config_base      1645 arch/arm/kernel/perf_event_v7.c 	bool krait_event = EVENT_CPU(hwc->config_base);
config_base      1762 arch/arm/kernel/perf_event_v7.c static void scorpion_evt_setup(int idx, u32 config_base)
config_base      1767 arch/arm/kernel/perf_event_v7.c 	unsigned int region = EVENT_REGION(config_base);
config_base      1768 arch/arm/kernel/perf_event_v7.c 	unsigned int group = EVENT_GROUP(config_base);
config_base      1769 arch/arm/kernel/perf_event_v7.c 	unsigned int code = EVENT_CODE(config_base);
config_base      1771 arch/arm/kernel/perf_event_v7.c 	bool venum_event = EVENT_VENUM(config_base);
config_base      1783 arch/arm/kernel/perf_event_v7.c 	val |= config_base & (ARMV7_EXCLUDE_USER | ARMV7_EXCLUDE_PL1);
config_base      1805 arch/arm/kernel/perf_event_v7.c static void scorpion_clearpmu(u32 config_base)
config_base      1809 arch/arm/kernel/perf_event_v7.c 	unsigned int region = EVENT_REGION(config_base);
config_base      1810 arch/arm/kernel/perf_event_v7.c 	unsigned int group = EVENT_GROUP(config_base);
config_base      1811 arch/arm/kernel/perf_event_v7.c 	bool venum_event = EVENT_VENUM(config_base);
config_base      1843 arch/arm/kernel/perf_event_v7.c 	if (hwc->config_base & KRAIT_EVENT_MASK)
config_base      1844 arch/arm/kernel/perf_event_v7.c 		scorpion_clearpmu(hwc->config_base);
config_base      1874 arch/arm/kernel/perf_event_v7.c 	if (hwc->config_base & KRAIT_EVENT_MASK)
config_base      1875 arch/arm/kernel/perf_event_v7.c 		scorpion_evt_setup(idx, hwc->config_base);
config_base      1877 arch/arm/kernel/perf_event_v7.c 		armv7_pmnc_write_evtsel(idx, hwc->config_base);
config_base      1920 arch/arm/kernel/perf_event_v7.c 	if (hwc->config_base & VENUM_EVENT)
config_base      1945 arch/arm/kernel/perf_event_v7.c 	unsigned int region = EVENT_REGION(hwc->config_base);
config_base      1946 arch/arm/kernel/perf_event_v7.c 	unsigned int group = EVENT_GROUP(hwc->config_base);
config_base      1947 arch/arm/kernel/perf_event_v7.c 	bool venum_event = EVENT_VENUM(hwc->config_base);
config_base      1948 arch/arm/kernel/perf_event_v7.c 	bool scorpion_event = EVENT_CPU(hwc->config_base);
config_base      1972 arch/arm/kernel/perf_event_v7.c 	unsigned int region = EVENT_REGION(hwc->config_base);
config_base      1973 arch/arm/kernel/perf_event_v7.c 	unsigned int group = EVENT_GROUP(hwc->config_base);
config_base      1974 arch/arm/kernel/perf_event_v7.c 	bool venum_event = EVENT_VENUM(hwc->config_base);
config_base      1975 arch/arm/kernel/perf_event_v7.c 	bool scorpion_event = EVENT_CPU(hwc->config_base);
config_base       219 arch/arm/kernel/perf_event_xscale.c 		evt = (hwc->config_base << XSCALE1_COUNT0_EVT_SHFT) |
config_base       224 arch/arm/kernel/perf_event_xscale.c 		evt = (hwc->config_base << XSCALE1_COUNT1_EVT_SHFT) |
config_base       279 arch/arm/kernel/perf_event_xscale.c 	if (XSCALE_PERFCTR_CCNT == hwc->config_base) {
config_base       568 arch/arm/kernel/perf_event_xscale.c 		evtsel |= hwc->config_base << XSCALE2_COUNT0_EVT_SHFT;
config_base       573 arch/arm/kernel/perf_event_xscale.c 		evtsel |= hwc->config_base << XSCALE2_COUNT1_EVT_SHFT;
config_base       578 arch/arm/kernel/perf_event_xscale.c 		evtsel |= hwc->config_base << XSCALE2_COUNT2_EVT_SHFT;
config_base       583 arch/arm/kernel/perf_event_xscale.c 		evtsel |= hwc->config_base << XSCALE2_COUNT3_EVT_SHFT;
config_base        37 arch/arm/mach-bcm/bcm63xx_smp.c 	unsigned long config_base;
config_base        47 arch/arm/mach-bcm/bcm63xx_smp.c 	config_base = scu_a9_get_base();
config_base        48 arch/arm/mach-bcm/bcm63xx_smp.c 	if (!config_base) {
config_base        53 arch/arm/mach-bcm/bcm63xx_smp.c 	scu_base = ioremap((phys_addr_t)config_base, CORTEX_A9_SCU_SIZE);
config_base        56 arch/arm/mach-bcm/bcm63xx_smp.c 			config_base, CORTEX_A9_SCU_SIZE);
config_base        47 arch/arm/mach-bcm/platsmp.c 	unsigned long config_base;
config_base        56 arch/arm/mach-bcm/platsmp.c 	config_base = scu_a9_get_base();
config_base        57 arch/arm/mach-bcm/platsmp.c 	if (!config_base) {
config_base        62 arch/arm/mach-bcm/platsmp.c 	scu_base = ioremap((phys_addr_t)config_base, CORTEX_A9_SCU_SIZE);
config_base        65 arch/arm/mach-bcm/platsmp.c 			config_base, CORTEX_A9_SCU_SIZE);
config_base       200 arch/arm/mm/cache-l2x0-pmu.c 	__l2x0_pmu_event_enable(hw->idx, hw->config_base);
config_base       311 arch/arm/mm/cache-l2x0-pmu.c 	hw->config_base = event->attr.config;
config_base       505 arch/arm64/kernel/perf_event.c 		armv8pmu_write_evtype(idx - 1, hwc->config_base);
config_base       508 arch/arm64/kernel/perf_event.c 		armv8pmu_write_evtype(idx, hwc->config_base);
config_base       794 arch/arm64/kernel/perf_event.c 	unsigned long evtype = hwc->config_base & ARMV8_PMU_EVTYPE_EVENT;
config_base       827 arch/arm64/kernel/perf_event.c 	unsigned long config_base = 0;
config_base       840 arch/arm64/kernel/perf_event.c 			config_base |= ARMV8_PMU_INCLUDE_EL2;
config_base       842 arch/arm64/kernel/perf_event.c 			config_base |= ARMV8_PMU_EXCLUDE_EL1;
config_base       844 arch/arm64/kernel/perf_event.c 			config_base |= ARMV8_PMU_EXCLUDE_EL0;
config_base       847 arch/arm64/kernel/perf_event.c 			config_base |= ARMV8_PMU_INCLUDE_EL2;
config_base       854 arch/arm64/kernel/perf_event.c 		config_base |= ARMV8_PMU_EXCLUDE_EL1;
config_base       857 arch/arm64/kernel/perf_event.c 		config_base |= ARMV8_PMU_EXCLUDE_EL0;
config_base       863 arch/arm64/kernel/perf_event.c 	event->config_base = config_base;
config_base       870 arch/arm64/kernel/perf_event.c 	unsigned long evtype = event->hw.config_base & ARMV8_PMU_EVTYPE_EVENT;
config_base       128 arch/mips/include/asm/sn/klconfig.h 	unsigned long	config_base;
config_base       324 arch/mips/kernel/perf_event_mipsxx.c 		(evt->config_base & M_PERFCTL_CONFIG_MASK) |
config_base      1312 arch/mips/kernel/perf_event_mipsxx.c 	hwc->config_base = MIPS_PERFCTRL_IE;
config_base      1319 arch/mips/kernel/perf_event_mipsxx.c 		hwc->config_base |= MIPS_PERFCTRL_U;
config_base      1321 arch/mips/kernel/perf_event_mipsxx.c 		hwc->config_base |= MIPS_PERFCTRL_K;
config_base      1323 arch/mips/kernel/perf_event_mipsxx.c 		hwc->config_base |= MIPS_PERFCTRL_EXL;
config_base      1326 arch/mips/kernel/perf_event_mipsxx.c 		hwc->config_base |= MIPS_PERFCTRL_S;
config_base      1328 arch/mips/kernel/perf_event_mipsxx.c 	hwc->config_base &= M_PERFCTL_CONFIG_MASK;
config_base       310 arch/nds32/kernel/perf_event_cpu.c 	unsigned long config_base = 0;
config_base       324 arch/nds32/kernel/perf_event_cpu.c 		config_base |= no_user_tracing;
config_base       327 arch/nds32/kernel/perf_event_cpu.c 		config_base |= no_kernel_tracing;
config_base       333 arch/nds32/kernel/perf_event_cpu.c 	event->config_base |= config_base;
config_base       445 arch/nds32/kernel/perf_event_cpu.c 		hwc->config_base = 0;
config_base       448 arch/nds32/kernel/perf_event_cpu.c 	evnum = hwc->config_base;
config_base       567 arch/nds32/kernel/perf_event_cpu.c 	unsigned long evtype = hwc->config_base & SOFTWARE_EVENT_MASK;
config_base       817 arch/nds32/kernel/perf_event_cpu.c 	hwc->config_base = 0;
config_base       835 arch/nds32/kernel/perf_event_cpu.c 	hwc->config_base |= (unsigned long)mapping;
config_base      1888 arch/powerpc/perf/core-book3s.c 	event->hw.config_base = ev;
config_base       340 arch/powerpc/perf/core-fsl-emb.c 	write_pmlca(i, event->hw.config_base);
config_base       549 arch/powerpc/perf/core-fsl-emb.c 	event->hw.config_base = PMLCA_CE | PMLCA_FCM1 |
config_base       553 arch/powerpc/perf/core-fsl-emb.c 		event->hw.config_base |= PMLCA_FCU;
config_base       555 arch/powerpc/perf/core-fsl-emb.c 		event->hw.config_base |= PMLCA_FCS;
config_base        71 arch/s390/include/asm/perf_event.h #define SAMPL_FLAGS(hwc)	((hwc)->config_base)
config_base        46 arch/s390/kernel/perf_cpum_cf.c 	switch (hwc->config_base) {
config_base       108 arch/s390/kernel/perf_cpum_cf.c 	ctrs_state = cpumf_ctr_ctl[hwc->config_base];
config_base       267 arch/s390/kernel/perf_cpum_cf.c 		hwc->config_base = set;
config_base       379 arch/s390/kernel/perf_cpum_cf.c 	ctr_set_enable(&cpuhw->state, hwc->config_base);
config_base       380 arch/s390/kernel/perf_cpum_cf.c 	ctr_set_start(&cpuhw->state, hwc->config_base);
config_base       390 arch/s390/kernel/perf_cpum_cf.c 	atomic_inc(&cpuhw->ctr_set[hwc->config_base]);
config_base       403 arch/s390/kernel/perf_cpum_cf.c 		if (!atomic_dec_return(&cpuhw->ctr_set[hwc->config_base]))
config_base       404 arch/s390/kernel/perf_cpum_cf.c 			ctr_set_stop(&cpuhw->state, hwc->config_base);
config_base       427 arch/s390/kernel/perf_cpum_cf.c 	ctr_set_enable(&cpuhw->state, event->hw.config_base);
config_base       452 arch/s390/kernel/perf_cpum_cf.c 	if (!atomic_read(&cpuhw->ctr_set[event->hw.config_base]))
config_base       453 arch/s390/kernel/perf_cpum_cf.c 		ctr_set_disable(&cpuhw->state, event->hw.config_base);
config_base       208 arch/s390/kernel/perf_cpum_cf_diag.c 	event->hw.config_base = 0;
config_base       221 arch/s390/kernel/perf_cpum_cf_diag.c 			event->hw.config_base |= cpumf_ctr_ctl[i];
config_base       225 arch/s390/kernel/perf_cpum_cf_diag.c 	if (!event->hw.config_base) {
config_base       236 arch/s390/kernel/perf_cpum_cf_diag.c 			    __func__, err, event->hw.config_base);
config_base       536 arch/s390/kernel/perf_cpum_cf_diag.c 	ctr_set_multiple_enable(&cpuhw->state, hwc->config_base);
config_base       539 arch/s390/kernel/perf_cpum_cf_diag.c 				   event->hw.config_base);
config_base       540 arch/s390/kernel/perf_cpum_cf_diag.c 	ctr_set_multiple_start(&cpuhw->state, hwc->config_base);
config_base       555 arch/s390/kernel/perf_cpum_cf_diag.c 	ctr_set_multiple_stop(&cpuhw->state, hwc->config_base);
config_base       558 arch/s390/kernel/perf_cpum_cf_diag.c 				   event->hw.config_base);
config_base       559 arch/s390/kernel/perf_cpum_cf_diag.c 	if (cf_diag_diffctr(csd, event->hw.config_base))
config_base       597 arch/s390/kernel/perf_cpum_cf_diag.c 	ctr_set_multiple_stop(&cpuhw->state, event->hw.config_base);
config_base       598 arch/s390/kernel/perf_cpum_cf_diag.c 	ctr_set_multiple_disable(&cpuhw->state, event->hw.config_base);
config_base       977 arch/sparc/kernel/perf_event.c 	cpuc->pcr[0] |= cpuc->event[0]->hw.config_base;
config_base      1010 arch/sparc/kernel/perf_event.c 		cpuc->pcr[idx] |= cp->hw.config_base;
config_base      1465 arch/sparc/kernel/perf_event.c 	hwc->config_base = sparc_pmu->irq_bit;
config_base      1467 arch/sparc/kernel/perf_event.c 		hwc->config_base |= sparc_pmu->user_bit;
config_base      1469 arch/sparc/kernel/perf_event.c 		hwc->config_base |= sparc_pmu->priv_bit;
config_base      1471 arch/sparc/kernel/perf_event.c 		hwc->config_base |= sparc_pmu->hv_bit;
config_base       310 arch/x86/events/amd/ibs.c 	hwc->config_base = perf_ibs->msr;
config_base       358 arch/x86/events/amd/ibs.c 		rdmsrl(event->hw.config_base, *config);
config_base       366 arch/x86/events/amd/ibs.c 	wrmsrl(hwc->config_base, hwc->config | config | perf_ibs->enable_mask);
config_base       381 arch/x86/events/amd/ibs.c 		wrmsrl(hwc->config_base, config);
config_base       383 arch/x86/events/amd/ibs.c 	wrmsrl(hwc->config_base, config);
config_base       433 arch/x86/events/amd/ibs.c 	rdmsrl(hwc->config_base, config);
config_base       600 arch/x86/events/amd/ibs.c 	msr = hwc->config_base;
config_base       109 arch/x86/events/amd/uncore.c 	wrmsrl(hwc->config_base, (hwc->config | ARCH_PERFMON_EVENTSEL_ENABLE));
config_base       117 arch/x86/events/amd/uncore.c 	wrmsrl(hwc->config_base, hwc->config);
config_base       156 arch/x86/events/amd/uncore.c 	hwc->config_base = uncore->msr_base + (2 * hwc->idx);
config_base      1068 arch/x86/events/core.c 		hwc->config_base = 0;
config_base      1071 arch/x86/events/core.c 		hwc->config_base = MSR_ARCH_PERFMON_FIXED_CTR_CTRL;
config_base      1075 arch/x86/events/core.c 		hwc->config_base = x86_pmu_config_addr(hwc->idx);
config_base      2139 arch/x86/events/intel/core.c 	rdmsrl(hwc->config_base, ctrl_val);
config_base      2141 arch/x86/events/intel/core.c 	wrmsrl(hwc->config_base, ctrl_val);
config_base      2164 arch/x86/events/intel/core.c 	if (unlikely(hwc->config_base == MSR_ARCH_PERFMON_FIXED_CTR_CTRL))
config_base      2225 arch/x86/events/intel/core.c 	rdmsrl(hwc->config_base, ctrl_val);
config_base      2228 arch/x86/events/intel/core.c 	wrmsrl(hwc->config_base, ctrl_val);
config_base      2255 arch/x86/events/intel/core.c 	if (unlikely(hwc->config_base == MSR_ARCH_PERFMON_FIXED_CTR_CTRL)) {
config_base       185 arch/x86/events/intel/knc.c 	(void)wrmsrl_safe(hwc->config_base + hwc->idx, val);
config_base       196 arch/x86/events/intel/knc.c 	(void)wrmsrl_safe(hwc->config_base + hwc->idx, val);
config_base       860 arch/x86/events/intel/p4.c 	rdmsrl(hwc->config_base, v);
config_base       862 arch/x86/events/intel/p4.c 		wrmsrl(hwc->config_base, v & ~P4_CCCR_OVF);
config_base       912 arch/x86/events/intel/p4.c 	(void)wrmsrl_safe(hwc->config_base,
config_base       981 arch/x86/events/intel/p4.c 	(void)wrmsrl_safe(hwc->config_base,
config_base       164 arch/x86/events/intel/p6.c 	(void)wrmsrl_safe(hwc->config_base, val);
config_base       181 arch/x86/events/intel/p6.c 	(void)wrmsrl_safe(hwc->config_base, val);
config_base       225 arch/x86/events/intel/uncore.c 		hwc->config_base = uncore_fixed_ctl(box);
config_base       229 arch/x86/events/intel/uncore.c 	hwc->config_base = uncore_event_ctl(box, hwc->idx);
config_base       242 arch/x86/events/intel/uncore_nhmex.c 	wrmsrl(event->hw.config_base, 0);
config_base       250 arch/x86/events/intel/uncore_nhmex.c 		wrmsrl(hwc->config_base, NHMEX_PMON_CTL_EN_BIT0);
config_base       252 arch/x86/events/intel/uncore_nhmex.c 		wrmsrl(hwc->config_base, hwc->config | NHMEX_PMON_CTL_EN_BIT22);
config_base       254 arch/x86/events/intel/uncore_nhmex.c 		wrmsrl(hwc->config_base, hwc->config | NHMEX_PMON_CTL_EN_BIT0);
config_base       387 arch/x86/events/intel/uncore_nhmex.c 	wrmsrl(hwc->config_base, NHMEX_PMON_CTL_EN_BIT0 |
config_base       474 arch/x86/events/intel/uncore_nhmex.c 	wrmsrl(hwc->config_base, hwc->config | NHMEX_PMON_CTL_EN_BIT22);
config_base       862 arch/x86/events/intel/uncore_nhmex.c 	wrmsrl(hwc->config_base, hwc->config | NHMEX_PMON_CTL_EN_BIT0);
config_base      1147 arch/x86/events/intel/uncore_nhmex.c 	wrmsrl(hwc->config_base, NHMEX_PMON_CTL_EN_BIT0 |
config_base       126 arch/x86/events/intel/uncore_snb.c 		wrmsrl(hwc->config_base, hwc->config | SNB_UNC_CTL_EN);
config_base       128 arch/x86/events/intel/uncore_snb.c 		wrmsrl(hwc->config_base, SNB_UNC_CTL_EN);
config_base       133 arch/x86/events/intel/uncore_snb.c 	wrmsrl(event->hw.config_base, 0);
config_base       938 arch/x86/events/intel/uncore_snb.c 		wrmsrl(hwc->config_base, hwc->config | SNB_UNC_CTL_EN);
config_base       940 arch/x86/events/intel/uncore_snb.c 		wrmsrl(hwc->config_base, NHM_UNC_FIXED_CTR_CTL_EN);
config_base       492 arch/x86/events/intel/uncore_snbep.c 	pci_write_config_dword(pdev, hwc->config_base, hwc->config | SNBEP_PMON_CTL_EN);
config_base       500 arch/x86/events/intel/uncore_snbep.c 	pci_write_config_dword(pdev, hwc->config_base, hwc->config);
config_base       557 arch/x86/events/intel/uncore_snbep.c 	wrmsrl(hwc->config_base, hwc->config | SNBEP_PMON_CTL_EN);
config_base       565 arch/x86/events/intel/uncore_snbep.c 	wrmsrl(hwc->config_base, hwc->config);
config_base      1139 arch/x86/events/intel/uncore_snbep.c 	pci_write_config_dword(pdev, hwc->config_base, hwc->config | SNBEP_PMON_CTL_EN);
config_base      1642 arch/x86/events/intel/uncore_snbep.c 	wrmsrl(hwc->config_base, hwc->config | SNBEP_PMON_CTL_EN);
config_base      2153 arch/x86/events/intel/uncore_snbep.c 		pci_write_config_dword(pdev, hwc->config_base,
config_base      2156 arch/x86/events/intel/uncore_snbep.c 		pci_write_config_dword(pdev, hwc->config_base,
config_base      2626 arch/x86/events/intel/uncore_snbep.c 	wrmsrl(hwc->config_base, hwc->config | SNBEP_PMON_CTL_EN);
config_base      3566 arch/x86/events/intel/uncore_snbep.c 	wrmsrl(hwc->config_base, hwc->config | SNBEP_PMON_CTL_EN);
config_base      4088 arch/x86/events/intel/uncore_snbep.c 	wrmsrl(hwc->config_base, hwc->config | SNBEP_PMON_CTL_EN);
config_base      4441 arch/x86/events/intel/uncore_snbep.c 	       box->io_addr + hwc->config_base);
config_base      4452 arch/x86/events/intel/uncore_snbep.c 	writel(hwc->config, box->io_addr + hwc->config_base);
config_base       842 arch/x86/events/perf_event.h 	wrmsrl(hwc->config_base, (hwc->config | enable_mask) & ~disable_mask);
config_base       857 arch/x86/events/perf_event.h 	wrmsrl(hwc->config_base, hwc->config);
config_base        94 drivers/media/dvb-core/dvb_ca_en50221.c 	u32 config_base;
config_base       517 drivers/media/dvb-core/dvb_ca_en50221.c 	sl->config_base = 0;
config_base       519 drivers/media/dvb-core/dvb_ca_en50221.c 		sl->config_base |= (tuple[2 + i] << (8 * i));
config_base       583 drivers/media/dvb-core/dvb_ca_en50221.c 		manfid, devid, sl->config_base, sl->config_option);
config_base       603 drivers/media/dvb-core/dvb_ca_en50221.c 	ca->pub->write_attribute_mem(ca->pub, slot, sl->config_base,
config_base       608 drivers/media/dvb-core/dvb_ca_en50221.c 						   sl->config_base);
config_base       279 drivers/net/can/sja1000/ems_pcmcia.c 	csval = pcmcia_map_mem_page(dev, dev->resource[2], dev->config_base);
config_base       212 drivers/net/ethernet/8390/axnet_cs.c     if (link->config_base != 0x03c0)
config_base       406 drivers/net/ethernet/8390/pcnet_cs.c     if (link->config_base != 0x03c0)
config_base       536 drivers/net/ethernet/8390/pcnet_cs.c 	if ((link->config_base == 0x03c0) &&
config_base       358 drivers/net/ethernet/fujitsu/fmvj18x_cs.c 		link->config_base = 0x800;
config_base       365 drivers/net/ethernet/fujitsu/fmvj18x_cs.c 	    link->config_base = 0x800;
config_base       371 drivers/net/ethernet/fujitsu/fmvj18x_cs.c 	    link->config_base = 0x800;
config_base       379 drivers/net/ethernet/fujitsu/fmvj18x_cs.c 	    if (link->config_base == 0x0fe0)
config_base       393 drivers/net/ethernet/smsc/smc91c92_cs.c     tmp = readb(smc->base + link->config_base + CISREG_COR);
config_base       395 drivers/net/ethernet/smsc/smc91c92_cs.c     writeb(tmp, smc->base + link->config_base + CISREG_COR);
config_base       447 drivers/net/ethernet/smsc/smc91c92_cs.c     offset = (smc->manfid == MANFID_MOTOROLA) ? link->config_base : 0;
config_base       241 drivers/pci/controller/pci-v3-semi.c 	void __iomem *config_base;
config_base       383 drivers/pci/controller/pci-v3-semi.c 	return v3->config_base + address + offset;
config_base       792 drivers/pci/controller/pci-v3-semi.c 	v3->config_base = devm_ioremap_resource(dev, regs);
config_base       793 drivers/pci/controller/pci-v3-semi.c 	if (IS_ERR(v3->config_base))
config_base       794 drivers/pci/controller/pci-v3-semi.c 		return PTR_ERR(v3->config_base);
config_base       279 drivers/pcmcia/ds.c 		p_dev->config_base = cis_config.base;
config_base       281 drivers/pcmcia/ds.c 		dev_dbg(dev, "base %x, regs %x", p_dev->config_base,
config_base       286 drivers/pcmcia/ds.c 		p_dev->config_base = 0;
config_base       177 drivers/pcmcia/pcmcia_resource.c 	addr = (p_dev->config_base + where) >> 1;
config_base       538 drivers/pcmcia/pcmcia_resource.c 		p_dev->vpp, flags, p_dev->config_base, p_dev->config_regs,
config_base       542 drivers/pcmcia/pcmcia_resource.c 	base = p_dev->config_base;
config_base       802 drivers/perf/arm-cci.c 	unsigned long cci_event = event->hw.config_base;
config_base       973 drivers/perf/arm-cci.c 		pmu_set_event(cci_pmu, i, event->hw.config_base);
config_base      1159 drivers/perf/arm-cci.c 		pmu_set_event(cci_pmu, idx, hwc->config_base);
config_base      1300 drivers/perf/arm-cci.c 	hwc->config_base	= 0;
config_base      1307 drivers/perf/arm-cci.c 	hwc->config_base	    |= (unsigned long)mapping;
config_base       687 drivers/perf/arm-ccn.c 	hw->config_base = bit;
config_base       708 drivers/perf/arm-ccn.c 			clear_bit(hw->config_base, source->xp.dt_cmp_mask);
config_base       710 drivers/perf/arm-ccn.c 			clear_bit(hw->config_base, source->pmu_events_mask);
config_base       954 drivers/perf/arm-ccn.c 	unsigned long wp = hw->config_base;
config_base      1004 drivers/perf/arm-ccn.c 	hw->event_base = CCN_XP_DT_CONFIG__DT_CFG__XP_PMU_EVENT(hw->config_base);
config_base      1012 drivers/perf/arm-ccn.c 			CCN_XP_PMU_EVENT_SEL__ID__SHIFT(hw->config_base));
config_base      1013 drivers/perf/arm-ccn.c 	val |= id << CCN_XP_PMU_EVENT_SEL__ID__SHIFT(hw->config_base);
config_base      1028 drivers/perf/arm-ccn.c 			hw->config_base);
config_base      1048 drivers/perf/arm-ccn.c 		CCN_HNF_PMU_EVENT_SEL__ID__SHIFT(hw->config_base));
config_base      1050 drivers/perf/arm-ccn.c 		CCN_HNF_PMU_EVENT_SEL__ID__SHIFT(hw->config_base);
config_base       345 drivers/perf/arm_dsu_pmu.c 	__dsu_pmu_set_event(idx, event->hw.config_base);
config_base       584 drivers/perf/arm_dsu_pmu.c 	event->hw.config_base = event->attr.config;
config_base       383 drivers/perf/arm_pmu.c 	hwc->config_base	= 0;
config_base       400 drivers/perf/arm_pmu.c 	hwc->config_base	    |= (unsigned long)mapping;
config_base        47 drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c #define GET_DDRC_EVENTID(hwc)	(hwc->config_base & 0x7)
config_base        22 drivers/perf/hisilicon/hisi_uncore_pmu.c #define HISI_GET_EVENTID(ev) (ev->hw.config_base & 0xff)
config_base       168 drivers/perf/hisilicon/hisi_uncore_pmu.c 	hwc->config_base	= event->attr.config;
config_base       389 drivers/perf/qcom_l2_pmu.c 	if (hwc->config_base == L2CYCLE_CTR_RAW_CODE) {
config_base       406 drivers/perf/qcom_l2_pmu.c 	group = L2_EVT_GROUP(hwc->config_base);
config_base       423 drivers/perf/qcom_l2_pmu.c 	if (hwc->config_base != L2CYCLE_CTR_RAW_CODE)
config_base       424 drivers/perf/qcom_l2_pmu.c 		clear_bit(L2_EVT_GROUP(hwc->config_base), cluster->used_groups);
config_base       572 drivers/perf/qcom_l2_pmu.c 	hwc->config_base = event->attr.config;
config_base       597 drivers/perf/qcom_l2_pmu.c 	if (hwc->config_base == L2CYCLE_CTR_RAW_CODE) {
config_base       600 drivers/perf/qcom_l2_pmu.c 		config = hwc->config_base;
config_base       250 drivers/perf/thunderx2_pmu.c 	hwc->config_base = (unsigned long)tx2_pmu->base
config_base       261 drivers/perf/thunderx2_pmu.c 	hwc->config_base = (unsigned long)tx2_pmu->base
config_base       275 drivers/perf/thunderx2_pmu.c 	reg_writel(val, hwc->config_base);
config_base       282 drivers/perf/thunderx2_pmu.c 	reg_writel(0, event->hw.config_base);
config_base       295 drivers/perf/thunderx2_pmu.c 	val = reg_readl(hwc->config_base);
config_base       298 drivers/perf/thunderx2_pmu.c 	reg_writel(val, hwc->config_base);
config_base       310 drivers/perf/thunderx2_pmu.c 	val = reg_readl(hwc->config_base);
config_base       312 drivers/perf/thunderx2_pmu.c 	reg_writel(val, hwc->config_base);
config_base        83 drivers/perf/xgene_pmu.c #define GET_AGENTID(ev)   (ev->hw.config_base & 0xFFFFFFFFUL)
config_base        84 drivers/perf/xgene_pmu.c #define GET_AGENT1ID(ev)  ((ev->hw.config_base >> 32) & 0xFFFFFFFFUL)
config_base       928 drivers/perf/xgene_pmu.c 	hw->config_base = event->attr.config1;
config_base      1518 drivers/tty/serial/8250/8250_pci.c 	u8 config_base;
config_base      1521 drivers/tty/serial/8250/8250_pci.c 	config_base = 0x40 + 0x08 * idx;
config_base      1524 drivers/tty/serial/8250/8250_pci.c 	pci_read_config_word(pdev, config_base + 4, &iobase);
config_base      1548 drivers/tty/serial/8250/8250_pci.c 	u8 config_base;
config_base      1576 drivers/tty/serial/8250/8250_pci.c 		config_base = 0x40 + 0x08 * i;
config_base      1582 drivers/tty/serial/8250/8250_pci.c 		pci_write_config_byte(dev, config_base + 0x00, 0x01);
config_base      1585 drivers/tty/serial/8250/8250_pci.c 		pci_write_config_byte(dev, config_base + 0x01, 0x33);
config_base      1588 drivers/tty/serial/8250/8250_pci.c 		pci_write_config_byte(dev, config_base + 0x04,
config_base      1592 drivers/tty/serial/8250/8250_pci.c 		pci_write_config_byte(dev, config_base + 0x05,
config_base      1595 drivers/tty/serial/8250/8250_pci.c 		pci_write_config_byte(dev, config_base + 0x06, dev->irq);
config_base      1607 drivers/tty/serial/8250/8250_pci.c 			pci_write_config_byte(dev, config_base + 0x07, 0x01);
config_base      1651 drivers/tty/serial/8250/8250_pci.c 	int config_base;
config_base      1673 drivers/tty/serial/8250/8250_pci.c 		config_base = 0x2A0 + 0x08 * i;
config_base      1676 drivers/tty/serial/8250/8250_pci.c 		pci_write_config_byte(dev, config_base + 0x01, 0x33);
config_base      1679 drivers/tty/serial/8250/8250_pci.c 		pci_write_config_byte(dev, config_base + 0, 0x01);
config_base       127 include/linux/perf_event.h 			unsigned long	config_base;
config_base       111 include/pcmcia/ds.h 	unsigned int		config_base;