conf1 30 arch/x86/events/amd/iommu.c #define GET_DEVID_MASK(x) ((x)->conf1 & 0xFFFFULL) conf1 31 arch/x86/events/amd/iommu.c #define GET_DOMID_MASK(x) (((x)->conf1 >> 16) & 0xFFFFULL) conf1 32 arch/x86/events/amd/iommu.c #define GET_PASID_MASK(x) (((x)->conf1 >> 32) & 0xFFFFFULL) conf1 228 arch/x86/events/amd/iommu.c hwc->conf1 = event->attr.config1; conf1 285 drivers/atm/lanai.c u32 conf1, conf2; /* CONFIG[12] registers */ conf1 494 drivers/atm/lanai.c reg_write(lanai, lanai->conf1, Config1_Reg); conf1 506 drivers/atm/lanai.c if (unlikely((lanai->conf1 & CONFIG1_POWERDOWN) != 0)) conf1 873 drivers/atm/lanai.c #define set_config1(x) do { lanai->conf1 = x; conf1_write(lanai); \ conf1 875 drivers/atm/lanai.c #define clock_h() set_config1(lanai->conf1 | CONFIG1_PROMCLK) conf1 876 drivers/atm/lanai.c #define clock_l() set_config1(lanai->conf1 &~ CONFIG1_PROMCLK) conf1 877 drivers/atm/lanai.c #define data_h() set_config1(lanai->conf1 | CONFIG1_PROMDATA) conf1 878 drivers/atm/lanai.c #define data_l() set_config1(lanai->conf1 &~ CONFIG1_PROMDATA) conf1 891 drivers/atm/lanai.c tmp = (lanai->conf1 & ~CONFIG1_PROMDATA) | conf1 893 drivers/atm/lanai.c if (lanai->conf1 != tmp) { conf1 1533 drivers/atm/lanai.c lanai->conf1 &= ~CONFIG1_POWERDOWN; conf1 1553 drivers/atm/lanai.c lanai->conf1 |= CONFIG1_POWERDOWN; conf1 1766 drivers/atm/lanai.c if (lanai->conf1 & CONFIG1_POWERDOWN) conf1 1885 drivers/atm/lanai.c if (unlikely(lanai->conf1 & CONFIG1_POWERDOWN)) conf1 2145 drivers/atm/lanai.c lanai->conf1 = reg_read(lanai, Config1_Reg); conf1 2146 drivers/atm/lanai.c lanai->conf1 &= ~(CONFIG1_GPOUT1 | CONFIG1_POWERDOWN | conf1 2148 drivers/atm/lanai.c lanai->conf1 |= CONFIG1_SET_LEDMODE(LEDMODE_NOT_SOOL); conf1 2149 drivers/atm/lanai.c reg_write(lanai, lanai->conf1 | CONFIG1_GPOUT1, Config1_Reg); conf1 2174 drivers/atm/lanai.c reg_write(lanai, lanai->conf1 | CONFIG1_GPOUT1, Config1_Reg); conf1 2178 drivers/atm/lanai.c lanai->conf1 |= (CONFIG1_GPOUT2 | CONFIG1_GPOUT3 | CONFIG1_DMA_ENABLE); conf1 2186 drivers/atm/lanai.c lanai->conf1 |= CONFIG1_DMA_ENABLE; conf1 2205 drivers/atm/lanai.c lanai->conf1 = (lanai->conf1 & ~CONFIG1_MASK_LOOPMODE) | conf1 2212 drivers/atm/lanai.c lanai->conf1 |= CONFIG1_POWERDOWN; conf1 2233 drivers/atm/lanai.c lanai->conf1 = reg_read(lanai, Config1_Reg) | CONFIG1_POWERDOWN; conf1 2253 drivers/atm/lanai.c lanai->conf1 = reg_read(lanai, Config1_Reg) & ~CONFIG1_POWERDOWN; conf1 2260 drivers/atm/lanai.c lanai->conf1 |= CONFIG1_POWERDOWN; conf1 79 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c u8 conf1; conf1 402 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c u8 threshold, conf0, conf1, ca; conf1 430 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c conf1 = default_hdmi_channel_config[runtime->channels - 2].conf1; conf1 435 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c writeb_relaxed(conf1, dw->data.base + HDMI_AHB_DMA_CONF1); conf1 44 drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c u8 conf1 = 0; conf1 75 drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c conf1 = HDMI_AUD_CONF1_WIDTH_16; conf1 79 drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c conf1 = HDMI_AUD_CONF1_WIDTH_24; conf1 85 drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c conf1 |= HDMI_AUD_CONF1_MODE_I2S; conf1 88 drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c conf1 |= HDMI_AUD_CONF1_MODE_RIGHT_J; conf1 91 drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c conf1 |= HDMI_AUD_CONF1_MODE_LEFT_J; conf1 94 drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c conf1 |= HDMI_AUD_CONF1_MODE_BURST_1; conf1 97 drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c conf1 |= HDMI_AUD_CONF1_MODE_BURST_2; conf1 110 drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c hdmi_write(audio, conf1, HDMI_AUD_CONF1); conf1 339 drivers/gpu/drm/mcde/mcde_display.c u32 conf1; conf1 348 drivers/gpu/drm/mcde/mcde_display.c conf1 = MCDE_OVL0CONF; conf1 356 drivers/gpu/drm/mcde/mcde_display.c conf1 = MCDE_OVL1CONF; conf1 364 drivers/gpu/drm/mcde/mcde_display.c conf1 = MCDE_OVL2CONF; conf1 372 drivers/gpu/drm/mcde/mcde_display.c conf1 = MCDE_OVL3CONF; conf1 380 drivers/gpu/drm/mcde/mcde_display.c conf1 = MCDE_OVL4CONF; conf1 388 drivers/gpu/drm/mcde/mcde_display.c conf1 = MCDE_OVL5CONF; conf1 401 drivers/gpu/drm/mcde/mcde_display.c writel(val, mcde->regs + conf1); conf1 77 drivers/hwmon/adm1031.c u8 conf1; conf1 166 drivers/hwmon/adm1031.c data->conf1 = adm1031_read_value(client, ADM1031_REG_CONF1); conf1 257 drivers/hwmon/adm1031.c (*(data)->chan_select_table)[FAN_CHAN_FROM_REG((data)->conf1)][idx % 2] conf1 345 drivers/hwmon/adm1031.c old_fan_mode = data->conf1; conf1 349 drivers/hwmon/adm1031.c ret = get_fan_auto_nearest(data, nr, val, data->conf1); conf1 355 drivers/hwmon/adm1031.c data->conf1 = FAN_CHAN_TO_REG(reg, data->conf1); conf1 356 drivers/hwmon/adm1031.c if ((data->conf1 & ADM1031_CONF1_AUTO_MODE) ^ conf1 358 drivers/hwmon/adm1031.c if (data->conf1 & ADM1031_CONF1_AUTO_MODE) { conf1 376 drivers/hwmon/adm1031.c data->conf1 = FAN_CHAN_TO_REG(reg, data->conf1); conf1 377 drivers/hwmon/adm1031.c adm1031_write_value(client, ADM1031_REG_CONF1, data->conf1); conf1 488 drivers/hwmon/adm1031.c if ((data->conf1 & ADM1031_CONF1_AUTO_MODE) && conf1 519 drivers/hwmon/adm1031.c if (data->conf1 & ADM1031_CONF1_AUTO_MODE) { conf1 520 drivers/hwmon/adm1031.c switch (data->conf1 & 0x60) { conf1 126 drivers/hwmon/emc2103.c u8 conf1; conf1 128 drivers/hwmon/emc2103.c if (read_u8_from_i2c(client, REG_FAN_CONF1, &conf1) < 0) conf1 131 drivers/hwmon/emc2103.c data->fan_multiplier = 1 << ((conf1 & 0x60) >> 5); conf1 132 drivers/hwmon/emc2103.c data->fan_rpm_control = (conf1 & 0x80) != 0; conf1 53 drivers/iio/light/isl29125.c u8 conf1; conf1 93 drivers/iio/light/isl29125.c data->conf1 | isl29125_regs[si].mode); conf1 117 drivers/iio/light/isl29125.c i2c_smbus_write_byte_data(data->client, ISL29125_CONF1, data->conf1); conf1 141 drivers/iio/light/isl29125.c if (data->conf1 & ISL29125_MODE_RANGE) conf1 161 drivers/iio/light/isl29125.c data->conf1 |= ISL29125_MODE_RANGE; conf1 163 drivers/iio/light/isl29125.c data->conf1 &= ~ISL29125_MODE_RANGE; conf1 167 drivers/iio/light/isl29125.c data->conf1); conf1 220 drivers/iio/light/isl29125.c data->conf1 |= ISL29125_MODE_RGB; conf1 222 drivers/iio/light/isl29125.c data->conf1); conf1 234 drivers/iio/light/isl29125.c data->conf1 &= ~ISL29125_MODE_MASK; conf1 235 drivers/iio/light/isl29125.c data->conf1 |= ISL29125_MODE_PD; conf1 237 drivers/iio/light/isl29125.c data->conf1); conf1 274 drivers/iio/light/isl29125.c data->conf1 = ISL29125_MODE_PD | ISL29125_MODE_RANGE; conf1 276 drivers/iio/light/isl29125.c data->conf1); conf1 303 drivers/iio/light/isl29125.c (data->conf1 & ~ISL29125_MODE_MASK) | ISL29125_MODE_PD); conf1 330 drivers/iio/light/isl29125.c data->conf1); conf1 575 drivers/media/rc/ene_ir.c u8 conf1 = ene_read_reg(dev, ENE_CIRCFG); conf1 578 drivers/media/rc/ene_ir.c dev->saved_conf1 = conf1; conf1 592 drivers/media/rc/ene_ir.c conf1 &= ~ENE_CIRCFG_RX_EN; conf1 595 drivers/media/rc/ene_ir.c conf1 |= ENE_CIRCFG_TX_EN | ENE_CIRCFG_TX_IRQ; conf1 596 drivers/media/rc/ene_ir.c ene_write_reg(dev, ENE_CIRCFG, conf1); conf1 1708 drivers/pci/quirks.c u32 conf1, conf5, class; conf1 1715 drivers/pci/quirks.c pci_read_config_dword(pdev, 0x40, &conf1); conf1 1718 drivers/pci/quirks.c conf1 &= ~0x00CFF302; /* Clear bit 1, 8, 9, 12-19, 22, 23 */ conf1 1726 drivers/pci/quirks.c conf1 |= 0x0002A100; /* Set 8, 13, 15, 17 */ conf1 1739 drivers/pci/quirks.c conf1 |= 0x00C2A1B3; /* Set 0, 1, 4, 5, 7, 8, 13, 15, 17, 22, 23 */ conf1 1744 drivers/pci/quirks.c conf1 |= 0x00C00000; /* Set 22, 23 */ conf1 1748 drivers/pci/quirks.c pci_write_config_dword(pdev, 0x40, conf1); conf1 164 include/linux/perf_event.h u64 conf1;