com_hsclk_sel      45 drivers/gpu/drm/msm/hdmi/hdmi_phy_8996.c 	u32 com_hsclk_sel;
com_hsclk_sel     290 drivers/gpu/drm/msm/hdmi/hdmi_phy_8996.c 	cfg->com_hsclk_sel = (0x20 | pd.hsclk_divsel);
com_hsclk_sel     362 drivers/gpu/drm/msm/hdmi/hdmi_phy_8996.c 	DBG("com_hsclk_sel = 0x%x", cfg->com_hsclk_sel);
com_hsclk_sel     460 drivers/gpu/drm/msm/hdmi/hdmi_phy_8996.c 		       cfg.com_hsclk_sel);