cntr 2783 arch/mips/include/asm/octeon/cvmx-mio-defs.h uint64_t cntr:64; cntr 2785 arch/mips/include/asm/octeon/cvmx-mio-defs.h uint64_t cntr:64; cntr 41 arch/mips/include/asm/txx9/tx3927.h volatile unsigned long cntr; cntr 155 arch/mips/sibyte/common/bus_watcher.c unsigned long cntr; cntr 176 arch/mips/sibyte/common/bus_watcher.c stats->l2_err = cntr = csr_in32(IOADDR(A_BUS_L2_ERRORS)); cntr 177 arch/mips/sibyte/common/bus_watcher.c stats->l2_cor_d += G_SCD_L2ECC_CORR_D(cntr); cntr 178 arch/mips/sibyte/common/bus_watcher.c stats->l2_bad_d += G_SCD_L2ECC_BAD_D(cntr); cntr 179 arch/mips/sibyte/common/bus_watcher.c stats->l2_cor_t += G_SCD_L2ECC_CORR_T(cntr); cntr 180 arch/mips/sibyte/common/bus_watcher.c stats->l2_bad_t += G_SCD_L2ECC_BAD_T(cntr); cntr 183 arch/mips/sibyte/common/bus_watcher.c stats->memio_err = cntr = csr_in32(IOADDR(A_BUS_MEM_IO_ERRORS)); cntr 184 arch/mips/sibyte/common/bus_watcher.c stats->mem_cor_d += G_SCD_MEM_ECC_CORR(cntr); cntr 185 arch/mips/sibyte/common/bus_watcher.c stats->mem_bad_d += G_SCD_MEM_ECC_BAD(cntr); cntr 186 arch/mips/sibyte/common/bus_watcher.c stats->bus_error += G_SCD_MEM_BUSERR(cntr); cntr 892 arch/powerpc/oprofile/op_model_cell.c static int cell_cpu_setup(struct op_counter_config *cntr) cntr 159 arch/x86/events/amd/iommu.c u32 shift, bank, cntr; cntr 166 arch/x86/events/amd/iommu.c for (cntr = 0; cntr < max_cntrs; cntr++) { cntr 167 arch/x86/events/amd/iommu.c shift = bank + (bank*3) + cntr; cntr 173 arch/x86/events/amd/iommu.c event->hw.iommu_cntr = cntr; cntr 186 arch/x86/events/amd/iommu.c u8 bank, u8 cntr) cntr 195 arch/x86/events/amd/iommu.c if ((bank > max_banks) || (cntr > max_cntrs)) cntr 198 arch/x86/events/amd/iommu.c shift = bank + cntr + (bank*3); cntr 243 arch/x86/events/amd/iommu.c u8 cntr = hwc->iommu_cntr; cntr 247 arch/x86/events/amd/iommu.c amd_iommu_pc_set_reg(iommu, bank, cntr, IOMMU_PC_COUNTER_SRC_REG, ®); cntr 253 arch/x86/events/amd/iommu.c amd_iommu_pc_set_reg(iommu, bank, cntr, IOMMU_PC_DEVID_MATCH_REG, ®); cntr 259 arch/x86/events/amd/iommu.c amd_iommu_pc_set_reg(iommu, bank, cntr, IOMMU_PC_PASID_MATCH_REG, ®); cntr 265 arch/x86/events/amd/iommu.c amd_iommu_pc_set_reg(iommu, bank, cntr, IOMMU_PC_DOMID_MATCH_REG, ®); cntr 35 arch/x86/events/amd/iommu.h extern int amd_iommu_pc_set_reg(struct amd_iommu *iommu, u8 bank, u8 cntr, cntr 38 arch/x86/events/amd/iommu.h extern int amd_iommu_pc_get_reg(struct amd_iommu *iommu, u8 bank, u8 cntr, cntr 2083 arch/x86/events/intel/core.c static void intel_tfa_commit_scheduling(struct cpu_hw_events *cpuc, int idx, int cntr) cntr 2088 arch/x86/events/intel/core.c if (cntr == 3) cntr 2833 arch/x86/events/intel/core.c static void intel_commit_scheduling(struct cpu_hw_events *cpuc, int idx, int cntr) cntr 2854 arch/x86/events/intel/core.c xl->state[cntr] = INTEL_EXCL_EXCLUSIVE; cntr 2856 arch/x86/events/intel/core.c xl->state[cntr] = INTEL_EXCL_SHARED; cntr 27 arch/x86/events/intel/p4.c char cntr[2][P4_CNTR_LIMIT]; /* counter index (offset), -1 on abscence */ cntr 84 arch/x86/events/intel/p4.c .cntr = { {4, 5, -1}, {6, 7, -1} }, cntr 91 arch/x86/events/intel/p4.c .cntr = { {0, -1, -1}, {2, -1, -1} }, cntr 100 arch/x86/events/intel/p4.c .cntr = { {0, -1, -1}, {2, -1, -1} }, cntr 108 arch/x86/events/intel/p4.c .cntr = { {8, 9, -1}, {10, 11, -1} }, cntr 116 arch/x86/events/intel/p4.c .cntr = { {8, 9, -1}, {10, 11, -1} }, cntr 123 arch/x86/events/intel/p4.c .cntr = { {8, 9, -1}, {10, 11, -1} }, cntr 130 arch/x86/events/intel/p4.c .cntr = { {8, 9, -1}, {10, 11, -1} }, cntr 140 arch/x86/events/intel/p4.c .cntr = { {0, -1, -1}, {2, -1, -1} }, cntr 149 arch/x86/events/intel/p4.c .cntr = { {0, -1, -1}, {2, -1, -1} }, cntr 164 arch/x86/events/intel/p4.c .cntr = { {0, -1, -1}, {2, -1, -1} }, cntr 181 arch/x86/events/intel/p4.c .cntr = { {0, -1, -1}, {2, -1, -1} }, cntr 198 arch/x86/events/intel/p4.c .cntr = { {2, -1, -1}, {3, -1, -1} }, cntr 211 arch/x86/events/intel/p4.c .cntr = { {0, -1, -1}, {2, -1, -1} }, cntr 230 arch/x86/events/intel/p4.c .cntr = { {0, -1, -1}, {1, -1, -1} }, cntr 249 arch/x86/events/intel/p4.c .cntr = { {2, -1, -1}, {3, -1, -1} }, cntr 257 arch/x86/events/intel/p4.c .cntr = { {8, 9, -1}, {10, 11, -1} }, cntr 265 arch/x86/events/intel/p4.c .cntr = { {8, 9, -1}, {10, 11, -1} }, cntr 273 arch/x86/events/intel/p4.c .cntr = { {8, 9, -1}, {10, 11, -1} }, cntr 281 arch/x86/events/intel/p4.c .cntr = { {8, 9, -1}, {10, 11, -1} }, cntr 289 arch/x86/events/intel/p4.c .cntr = { {8, 9, -1}, {10, 11, -1} }, cntr 297 arch/x86/events/intel/p4.c .cntr = { {8, 9, -1}, {10, 11, -1} }, cntr 305 arch/x86/events/intel/p4.c .cntr = { {8, 9, -1}, {10, 11, -1} }, cntr 313 arch/x86/events/intel/p4.c .cntr = { {8, 9, -1}, {10, 11, -1} }, cntr 320 arch/x86/events/intel/p4.c .cntr = { {4, 5, -1}, {6, 7, -1} }, cntr 327 arch/x86/events/intel/p4.c .cntr = { {0, -1, -1}, {2, -1, -1} }, cntr 334 arch/x86/events/intel/p4.c .cntr = { {4, 5, -1}, {6, 7, -1} }, cntr 343 arch/x86/events/intel/p4.c .cntr = { {4, 5, -1}, {6, 7, -1} }, cntr 353 arch/x86/events/intel/p4.c .cntr = { {4, 5, -1}, {6, 7, -1} }, cntr 363 arch/x86/events/intel/p4.c .cntr = { {4, 5, -1}, {6, 7, -1} }, cntr 370 arch/x86/events/intel/p4.c .cntr = { {12, 13, 16}, {14, 15, 17} }, cntr 379 arch/x86/events/intel/p4.c .cntr = { {8, 9, -1}, {10, 11, -1} }, cntr 385 arch/x86/events/intel/p4.c .cntr = { {0, -1, -1}, {2, -1, -1} }, cntr 391 arch/x86/events/intel/p4.c .cntr = { {0, -1, -1}, {2, -1, -1} }, cntr 397 arch/x86/events/intel/p4.c .cntr = { {0, -1, -1}, {2, -1, -1} }, cntr 403 arch/x86/events/intel/p4.c .cntr = { {0, -1, -1}, {2, -1, -1} }, cntr 411 arch/x86/events/intel/p4.c .cntr = { {12, 13, 16}, {14, 15, 17} }, cntr 425 arch/x86/events/intel/p4.c .cntr = { {12, 13, 16}, {14, 15, 17} }, cntr 433 arch/x86/events/intel/p4.c .cntr = { {12, 13, 16}, {14, 15, 17} }, cntr 443 arch/x86/events/intel/p4.c .cntr = { {12, 13, 16}, {14, 15, 17} }, cntr 451 arch/x86/events/intel/p4.c .cntr = { {12, 13, 16}, {14, 15, 17} }, cntr 459 arch/x86/events/intel/p4.c .cntr = { {12, 13, 16}, {14, 15, 17} }, cntr 469 arch/x86/events/intel/p4.c .cntr = { {12, 13, 16}, {14, 15, 17} }, cntr 476 arch/x86/events/intel/p4.c .cntr = { {12, 13, 16}, {14, 15, 17} }, cntr 487 arch/x86/events/intel/p4.c .cntr = { {12, 13, 16}, {14, 15, 17} }, cntr 496 arch/x86/events/intel/p4.c .cntr = { {12, 13, 16}, {14, 15, 17} }, cntr 504 arch/x86/events/intel/p4.c .cntr = { {12, 13, 16}, {14, 15, 17} }, cntr 1198 arch/x86/events/intel/p4.c j = bind->cntr[thread][i]; cntr 609 arch/x86/events/perf_event.h void (*commit_scheduling)(struct cpu_hw_events *cpuc, int idx, int cntr); cntr 519 drivers/gpu/drm/gma500/cdv_device.c .cntr = DSPACNTR, cntr 544 drivers/gpu/drm/gma500/cdv_device.c .cntr = DSPBCNTR, cntr 812 drivers/gpu/drm/gma500/cdv_intel_display.c REG_WRITE(map->cntr, dspcntr); cntr 85 drivers/gpu/drm/gma500/gma_display.c dspcntr = REG_READ(map->cntr); cntr 107 drivers/gpu/drm/gma500/gma_display.c REG_WRITE(map->cntr, dspcntr); cntr 232 drivers/gpu/drm/gma500/gma_display.c temp = REG_READ(map->cntr); cntr 234 drivers/gpu/drm/gma500/gma_display.c REG_WRITE(map->cntr, cntr 279 drivers/gpu/drm/gma500/gma_display.c temp = REG_READ(map->cntr); cntr 281 drivers/gpu/drm/gma500/gma_display.c REG_WRITE(map->cntr, cntr 539 drivers/gpu/drm/gma500/gma_display.c crtc_state->saveDSPCNTR = REG_READ(map->cntr); cntr 616 drivers/gpu/drm/gma500/gma_display.c REG_WRITE(map->cntr, crtc_state->saveDSPCNTR); cntr 203 drivers/gpu/drm/gma500/mdfld_device.c pipe->cntr = PSB_RVDC32(map->cntr); cntr 347 drivers/gpu/drm/gma500/mdfld_device.c PSB_WVDC32(pipe->cntr & ~DISPLAY_PLANE_ENABLE, map->cntr); cntr 365 drivers/gpu/drm/gma500/mdfld_device.c PSB_WVDC32(pipe->cntr, map->cntr); cntr 441 drivers/gpu/drm/gma500/mdfld_device.c .cntr = DSPACNTR, cntr 463 drivers/gpu/drm/gma500/mdfld_device.c .cntr = DSPBCNTR, cntr 485 drivers/gpu/drm/gma500/mdfld_device.c .cntr = DSPCCNTR, cntr 630 drivers/gpu/drm/gma500/mdfld_dsi_pkg_sender.c pkg_sender->dspcntr_reg = map->cntr; cntr 193 drivers/gpu/drm/gma500/mdfld_intel_display.c dspcntr = REG_READ(map->cntr); cntr 211 drivers/gpu/drm/gma500/mdfld_intel_display.c REG_WRITE(map->cntr, dspcntr); cntr 243 drivers/gpu/drm/gma500/mdfld_intel_display.c temp = REG_READ(map->cntr); cntr 245 drivers/gpu/drm/gma500/mdfld_intel_display.c REG_WRITE(map->cntr, cntr 355 drivers/gpu/drm/gma500/mdfld_intel_display.c temp = REG_READ(map->cntr); cntr 357 drivers/gpu/drm/gma500/mdfld_intel_display.c REG_WRITE(map->cntr, cntr 382 drivers/gpu/drm/gma500/mdfld_intel_display.c temp = REG_READ(map->cntr); cntr 383 drivers/gpu/drm/gma500/mdfld_intel_display.c REG_WRITE(map->cntr, cntr 398 drivers/gpu/drm/gma500/mdfld_intel_display.c temp = REG_READ(map->cntr); cntr 399 drivers/gpu/drm/gma500/mdfld_intel_display.c REG_WRITE(map->cntr, cntr 431 drivers/gpu/drm/gma500/mdfld_intel_display.c temp = REG_READ(map->cntr); cntr 433 drivers/gpu/drm/gma500/mdfld_intel_display.c REG_WRITE(map->cntr, cntr 848 drivers/gpu/drm/gma500/mdfld_intel_display.c dev_priv->dspcntr[pipe] = REG_READ(map->cntr); cntr 1004 drivers/gpu/drm/gma500/mdfld_intel_display.c REG_WRITE(map->cntr, dev_priv->dspcntr[pipe]); cntr 268 drivers/gpu/drm/gma500/oaktrail_crtc.c temp = REG_READ_WITH_AUX(map->cntr, i); cntr 270 drivers/gpu/drm/gma500/oaktrail_crtc.c REG_WRITE_WITH_AUX(map->cntr, cntr 294 drivers/gpu/drm/gma500/oaktrail_crtc.c temp = REG_READ_WITH_AUX(map->cntr, i); cntr 296 drivers/gpu/drm/gma500/oaktrail_crtc.c REG_WRITE_WITH_AUX(map->cntr, cntr 487 drivers/gpu/drm/gma500/oaktrail_crtc.c dspcntr = REG_READ(map->cntr); cntr 579 drivers/gpu/drm/gma500/oaktrail_crtc.c REG_WRITE_WITH_AUX(map->cntr, dspcntr, i); cntr 616 drivers/gpu/drm/gma500/oaktrail_crtc.c dspcntr = REG_READ(map->cntr); cntr 638 drivers/gpu/drm/gma500/oaktrail_crtc.c REG_WRITE(map->cntr, dspcntr); cntr 210 drivers/gpu/drm/gma500/oaktrail_device.c p->cntr = PSB_RVDC32(DSPACNTR); cntr 345 drivers/gpu/drm/gma500/oaktrail_device.c PSB_WVDC32(p->cntr, DSPACNTR); cntr 457 drivers/gpu/drm/gma500/oaktrail_device.c .cntr = DSPACNTR, cntr 481 drivers/gpu/drm/gma500/oaktrail_device.c .cntr = DSPBCNTR, cntr 788 drivers/gpu/drm/gma500/oaktrail_hdmi.c pipeb->cntr = PSB_RVDC32(DSPBCNTR); cntr 846 drivers/gpu/drm/gma500/oaktrail_hdmi.c PSB_WVDC32(pipeb->cntr, DSPBCNTR); cntr 254 drivers/gpu/drm/gma500/psb_device.c .cntr = DSPACNTR, cntr 278 drivers/gpu/drm/gma500/psb_device.c .cntr = DSPBCNTR, cntr 267 drivers/gpu/drm/gma500/psb_drv.h u32 cntr; cntr 301 drivers/gpu/drm/gma500/psb_drv.h u32 cntr; cntr 286 drivers/gpu/drm/gma500/psb_intel_display.c REG_WRITE(map->cntr, dspcntr); cntr 288 drivers/infiniband/hw/hfi1/affinity.c u16 cntr; cntr 310 drivers/infiniband/hw/hfi1/affinity.c cntr = *per_cpu_ptr(comp_vect_affinity, curr_cpu); cntr 312 drivers/infiniband/hw/hfi1/affinity.c if (cntr < prev_cntr) { cntr 314 drivers/infiniband/hw/hfi1/affinity.c prev_cntr = cntr; cntr 329 drivers/infiniband/hw/hfi1/affinity.c u16 cntr; cntr 344 drivers/infiniband/hw/hfi1/affinity.c cntr = *per_cpu_ptr(comp_vect_affinity, curr_cpu); cntr 346 drivers/infiniband/hw/hfi1/affinity.c if (cntr > prev_cntr) { cntr 348 drivers/infiniband/hw/hfi1/affinity.c prev_cntr = cntr; cntr 1299 drivers/infiniband/hw/hfi1/chip.c #define SW_IBP_CNTR(name, cntr) \ cntr 1304 drivers/infiniband/hw/hfi1/chip.c access_ibp_##cntr) cntr 1526 drivers/infiniband/hw/hfi1/chip.c static inline u64 read_write_sw(struct hfi1_devdata *dd, u64 *cntr, int mode, cntr 1532 drivers/infiniband/hw/hfi1/chip.c ret = *cntr; cntr 1534 drivers/infiniband/hw/hfi1/chip.c *cntr = data; cntr 1619 drivers/infiniband/hw/hfi1/chip.c u64 get_all_cpu_total(u64 __percpu *cntr) cntr 1625 drivers/infiniband/hw/hfi1/chip.c counter += *per_cpu_ptr(cntr, cpu); cntr 1630 drivers/infiniband/hw/hfi1/chip.c u64 __percpu *cntr, cntr 1639 drivers/infiniband/hw/hfi1/chip.c ret = get_all_cpu_total(cntr) - *z_val; cntr 1643 drivers/infiniband/hw/hfi1/chip.c *z_val = get_all_cpu_total(cntr); cntr 4073 drivers/infiniband/hw/hfi1/chip.c #define def_access_sw_cpu(cntr) \ cntr 4074 drivers/infiniband/hw/hfi1/chip.c static u64 access_sw_cpu_##cntr(const struct cntr_entry *entry, \ cntr 4078 drivers/infiniband/hw/hfi1/chip.c return read_write_cpu(ppd->dd, &ppd->ibport_data.rvp.z_ ##cntr, \ cntr 4079 drivers/infiniband/hw/hfi1/chip.c ppd->ibport_data.rvp.cntr, vl, \ cntr 4087 drivers/infiniband/hw/hfi1/chip.c #define def_access_ibp_counter(cntr) \ cntr 4088 drivers/infiniband/hw/hfi1/chip.c static u64 access_ibp_##cntr(const struct cntr_entry *entry, \ cntr 4096 drivers/infiniband/hw/hfi1/chip.c return read_write_sw(ppd->dd, &ppd->ibport_data.rvp.n_ ##cntr, \ cntr 1417 drivers/infiniband/hw/hfi1/chip.h u64 get_all_cpu_total(u64 __percpu *cntr); cntr 705 drivers/infiniband/hw/hfi1/hfi.h static inline void incr_cntr64(u64 *cntr) cntr 707 drivers/infiniband/hw/hfi1/hfi.h if (*cntr < (u64)-1LL) cntr 708 drivers/infiniband/hw/hfi1/hfi.h (*cntr)++; cntr 711 drivers/infiniband/hw/hfi1/hfi.h static inline void incr_cntr32(u32 *cntr) cntr 713 drivers/infiniband/hw/hfi1/hfi.h if (*cntr < (u32)-1LL) cntr 714 drivers/infiniband/hw/hfi1/hfi.h (*cntr)++; cntr 1653 drivers/infiniband/hw/qib/qib_iba6120.c u32 cntr = dd->cspec->lli_counter; cntr 1655 drivers/infiniband/hw/qib/qib_iba6120.c cntr += crcs; cntr 1656 drivers/infiniband/hw/qib/qib_iba6120.c if (cntr) { cntr 1657 drivers/infiniband/hw/qib/qib_iba6120.c if (cntr > dd->cspec->lli_thresh) { cntr 1661 drivers/infiniband/hw/qib/qib_iba6120.c dd->cspec->lli_counter += cntr; cntr 2519 drivers/infiniband/hw/qib/qib_iba6120.c u64 *cntr = dd->cspec->cntrs; cntr 2523 drivers/infiniband/hw/qib/qib_iba6120.c if (!cntr || pos >= ret) { cntr 2532 drivers/infiniband/hw/qib/qib_iba6120.c *cntrp = cntr; cntr 2534 drivers/infiniband/hw/qib/qib_iba6120.c *cntr++ = read_6120_creg32(dd, cntr6120indices[i]); cntr 2552 drivers/infiniband/hw/qib/qib_iba6120.c u64 *cntr = dd->cspec->portcntrs; cntr 2557 drivers/infiniband/hw/qib/qib_iba6120.c if (!cntr || pos >= ret) { cntr 2562 drivers/infiniband/hw/qib/qib_iba6120.c *cntrp = cntr; cntr 2565 drivers/infiniband/hw/qib/qib_iba6120.c *cntr++ = qib_portcntr_6120(ppd, cntr 2569 drivers/infiniband/hw/qib/qib_iba6120.c *cntr++ = read_6120_creg32(dd, cntr 3175 drivers/infiniband/hw/qib/qib_iba7220.c u64 *cntr = dd->cspec->cntrs; cntr 3179 drivers/infiniband/hw/qib/qib_iba7220.c if (!cntr || pos >= ret) { cntr 3185 drivers/infiniband/hw/qib/qib_iba7220.c *cntrp = cntr; cntr 3187 drivers/infiniband/hw/qib/qib_iba7220.c *cntr++ = read_7220_creg32(dd, cntr7220indices[i]); cntr 3208 drivers/infiniband/hw/qib/qib_iba7220.c u64 *cntr = dd->cspec->portcntrs; cntr 3213 drivers/infiniband/hw/qib/qib_iba7220.c if (!cntr || pos >= ret) { cntr 3218 drivers/infiniband/hw/qib/qib_iba7220.c *cntrp = cntr; cntr 3221 drivers/infiniband/hw/qib/qib_iba7220.c *cntr++ = qib_portcntr_7220(ppd, cntr 3225 drivers/infiniband/hw/qib/qib_iba7220.c *cntr++ = read_7220_creg32(dd, cntr 5035 drivers/infiniband/hw/qib/qib_iba7322.c u64 *cntr = dd->cspec->cntrs; cntr 5039 drivers/infiniband/hw/qib/qib_iba7322.c if (!cntr || pos >= ret) { cntr 5044 drivers/infiniband/hw/qib/qib_iba7322.c *cntrp = cntr; cntr 5047 drivers/infiniband/hw/qib/qib_iba7322.c *cntr++ = read_7322_creg(dd, cntr 5051 drivers/infiniband/hw/qib/qib_iba7322.c *cntr++ = read_7322_creg32(dd, cntr 5071 drivers/infiniband/hw/qib/qib_iba7322.c u64 *cntr = ppd->cpspec->portcntrs; cntr 5075 drivers/infiniband/hw/qib/qib_iba7322.c if (!cntr || pos >= ret) { cntr 5080 drivers/infiniband/hw/qib/qib_iba7322.c *cntrp = cntr; cntr 5083 drivers/infiniband/hw/qib/qib_iba7322.c *cntr++ = qib_portcntr_7322(ppd, cntr 5087 drivers/infiniband/hw/qib/qib_iba7322.c *cntr++ = read_7322_creg_port(ppd, cntr 5091 drivers/infiniband/hw/qib/qib_iba7322.c *cntr++ = read_7322_creg32_port(ppd, cntr 467 drivers/infiniband/hw/qib/qib_sysfs.c static u64 get_all_cpu_total(u64 __percpu *cntr) cntr 473 drivers/infiniband/hw/qib/qib_sysfs.c counter += *per_cpu_ptr(cntr, cpu); cntr 477 drivers/infiniband/hw/qib/qib_sysfs.c #define def_write_per_cpu(cntr) \ cntr 478 drivers/infiniband/hw/qib/qib_sysfs.c static void write_per_cpu_##cntr(struct qib_pportdata *ppd, u32 data) \ cntr 484 drivers/infiniband/hw/qib/qib_sysfs.c qibp->rvp.z_##cntr = get_all_cpu_total(qibp->rvp.cntr); \ cntr 493 drivers/infiniband/hw/qib/qib_sysfs.c #define READ_PER_CPU_CNTR(cntr) (get_all_cpu_total(qibp->rvp.cntr) - \ cntr 494 drivers/infiniband/hw/qib/qib_sysfs.c qibp->rvp.z_##cntr) cntr 1658 drivers/iommu/amd_iommu_init.c static int iommu_pc_get_set_reg(struct amd_iommu *iommu, u8 bank, u8 cntr, cntr 3132 drivers/iommu/amd_iommu_init.c static int iommu_pc_get_set_reg(struct amd_iommu *iommu, u8 bank, u8 cntr, cntr 3146 drivers/iommu/amd_iommu_init.c offset = (u32)(((0x40 | bank) << 12) | (cntr << 8) | fxn); cntr 3170 drivers/iommu/amd_iommu_init.c int amd_iommu_pc_get_reg(struct amd_iommu *iommu, u8 bank, u8 cntr, u8 fxn, u64 *value) cntr 3175 drivers/iommu/amd_iommu_init.c return iommu_pc_get_set_reg(iommu, bank, cntr, fxn, value, false); cntr 3179 drivers/iommu/amd_iommu_init.c int amd_iommu_pc_set_reg(struct amd_iommu *iommu, u8 bank, u8 cntr, u8 fxn, u64 *value) cntr 3184 drivers/iommu/amd_iommu_init.c return iommu_pc_get_set_reg(iommu, bank, cntr, fxn, value, true); cntr 323 drivers/media/dvb-frontends/stv0900_core.c static u32 stv0900_get_err_count(struct stv0900_internal *intp, int cntr, cntr 328 drivers/media/dvb-frontends/stv0900_core.c switch (cntr) { cntr 343 drivers/media/usb/gspca/gl860/gl860-mi1320.c s32 cntr = sd->vcur.contrast; cntr 502 drivers/media/usb/gspca/gl860/gl860-mi1320.c if (cntr != sd->vold.contrast) { cntr 503 drivers/media/usb/gspca/gl860/gl860-mi1320.c sd->vold.contrast = cntr; cntr 504 drivers/media/usb/gspca/gl860/gl860-mi1320.c if (cntr < 0 || cntr > sd->vmax.contrast) cntr 505 drivers/media/usb/gspca/gl860/gl860-mi1320.c cntr = 0; cntr 509 drivers/media/usb/gspca/gl860/gl860-mi1320.c ctrl_out(gspca_dev, 0x40, 1, 0xba00 + tbl_cntr1[cntr], 0x0035, cntr 511 drivers/media/usb/gspca/gl860/gl860-mi1320.c ctrl_out(gspca_dev, 0x40, 1, 0xba00 + tbl_cntr2[cntr], 0x00f1, cntr 629 drivers/media/usb/gspca/gl860/gl860-mi2020.c s32 cntr = sd->vcur.contrast; cntr 734 drivers/media/usb/gspca/gl860/gl860-mi2020.c if (cntr != sd->vold.contrast || gam != sd->vold.gamma) { cntr 735 drivers/media/usb/gspca/gl860/gl860-mi2020.c sd->vold.contrast = cntr; cntr 736 drivers/media/usb/gspca/gl860/gl860-mi2020.c if (cntr < 0 || cntr > sd->vmax.contrast) cntr 737 drivers/media/usb/gspca/gl860/gl860-mi2020.c cntr = 0; cntr 744 drivers/media/usb/gspca/gl860/gl860-mi2020.c if (cntr == 0) cntr 745 drivers/media/usb/gspca/gl860/gl860-mi2020.c cntr = 4; cntr 746 drivers/media/usb/gspca/gl860/gl860-mi2020.c dat_multi4[2] = dat_multi2[2] = cntr * 0x10 + 2 - gam; cntr 343 drivers/media/usb/gspca/gl860/gl860-ov2640.c s32 cntr = sd->vcur.contrast; cntr 383 drivers/media/usb/gspca/gl860/gl860-ov2640.c if (cntr != sd->vold.contrast) { cntr 384 drivers/media/usb/gspca/gl860/gl860-ov2640.c sd->vold.contrast = cntr; cntr 385 drivers/media/usb/gspca/gl860/gl860-ov2640.c if (cntr < 0 || cntr > sd->vmax.contrast) cntr 386 drivers/media/usb/gspca/gl860/gl860-ov2640.c cntr = 0; cntr 390 drivers/media/usb/gspca/gl860/gl860-ov2640.c ctrl_out(gspca_dev, 0x40, 1, 0x6000 + cntr, 0x007d, 0, NULL); cntr 638 drivers/mmc/host/sdhci-pci-core.c int cntr; cntr 650 drivers/mmc/host/sdhci-pci-core.c for (cntr = 0; cntr < SDHCI_INTEL_PWR_TIMEOUT_CNT; cntr++) { cntr 3713 drivers/net/ethernet/broadcom/cnic_defs.h u16 cntr; cntr 3717 drivers/net/ethernet/broadcom/cnic_defs.h u16 cntr; cntr 702 drivers/net/ethernet/marvell/octeontx2/af/mbox.h u16 cntr; /* Counter for this MCAM entry */ cntr 736 drivers/net/ethernet/marvell/octeontx2/af/mbox.h u16 cntr; /* Counter allocated or start index if contiguous. cntr 745 drivers/net/ethernet/marvell/octeontx2/af/mbox.h u16 cntr; /* Free a counter or clear/fetch it's stats */ cntr 755 drivers/net/ethernet/marvell/octeontx2/af/mbox.h u16 cntr; cntr 773 drivers/net/ethernet/marvell/octeontx2/af/mbox.h u16 cntr; cntr 1219 drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c u16 pcifunc, int cntr) cntr 1224 drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c if (cntr >= mcam->counters.max) cntr 1227 drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c if (pcifunc != mcam->cntr2pfvf_map[cntr]) cntr 1234 drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c int blkaddr, u16 entry, u16 cntr) cntr 1240 drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c mcam->entry2cntr_map[entry] = cntr; cntr 1241 drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c mcam->cntr_refcnt[cntr]++; cntr 1245 drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c BIT_ULL(9) | cntr); cntr 1250 drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c int blkaddr, u16 entry, u16 cntr) cntr 1257 drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c mcam->cntr_refcnt[cntr]--; cntr 1298 drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c u16 index, cntr; cntr 1310 drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c cntr = mcam->entry2cntr_map[index]; cntr 1311 drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c if (cntr != NPC_MCAM_INVALID_MAP) cntr 1314 drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c cntr); cntr 1322 drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c u16 cntr; cntr 1325 drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c for (cntr = 0; cntr < mcam->counters.max; cntr++) { cntr 1326 drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c if (mcam->cntr2pfvf_map[cntr] == pcifunc) { cntr 1327 drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c mcam->cntr2pfvf_map[cntr] = NPC_MCAM_INVALID_MAP; cntr 1328 drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c mcam->cntr_refcnt[cntr] = 0; cntr 1329 drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c rvu_free_rsrc(&mcam->counters, cntr); cntr 1681 drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c u16 cntr; cntr 1705 drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c cntr = mcam->entry2cntr_map[req->entry]; cntr 1706 drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c if (cntr != NPC_MCAM_INVALID_MAP) cntr 1708 drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c req->entry, cntr); cntr 1738 drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c npc_mcam_verify_counter(mcam, pcifunc, req->cntr)) { cntr 1753 drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c req->entry, req->cntr); cntr 1814 drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c u16 index, cntr; cntr 1853 drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c cntr = mcam->entry2cntr_map[old_entry]; cntr 1854 drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c if (cntr != NPC_MCAM_INVALID_MAP) { cntr 1856 drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c old_entry, cntr); cntr 1858 drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c new_entry, cntr); cntr 1882 drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c u16 max_contig, cntr; cntr 1917 drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c rsp->cntr = index; cntr 1918 drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c for (cntr = index; cntr < (index + max_contig); cntr++) { cntr 1919 drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c __set_bit(cntr, mcam->counters.bmap); cntr 1920 drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c mcam->cntr2pfvf_map[cntr] = pcifunc; cntr 1926 drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c for (cntr = 0; cntr < req->count; cntr++) { cntr 1930 drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c rsp->cntr_list[cntr] = index; cntr 1952 drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c err = npc_mcam_verify_counter(mcam, req->hdr.pcifunc, req->cntr); cntr 1959 drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c mcam->cntr2pfvf_map[req->cntr] = NPC_MCAM_INVALID_MAP; cntr 1960 drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c rvu_free_rsrc(&mcam->counters, req->cntr); cntr 1964 drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c if (!mcam->cntr_refcnt[req->cntr]) cntr 1970 drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c if (mcam->entry2cntr_map[index] != req->cntr) cntr 1975 drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c index, req->cntr); cntr 1994 drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c rc = npc_mcam_verify_counter(mcam, req->hdr.pcifunc, req->cntr); cntr 2004 drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c req->entry, req->cntr); cntr 2010 drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c if (!mcam->cntr_refcnt[req->cntr]) cntr 2016 drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c if (mcam->entry2cntr_map[index] != req->cntr) cntr 2021 drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c index, req->cntr); cntr 2039 drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c err = npc_mcam_verify_counter(mcam, req->hdr.pcifunc, req->cntr); cntr 2044 drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c rvu_write64(rvu, blkaddr, NPC_AF_MATCH_STATX(req->cntr), 0x00); cntr 2061 drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c err = npc_mcam_verify_counter(mcam, req->hdr.pcifunc, req->cntr); cntr 2066 drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c rsp->stat = rvu_read64(rvu, blkaddr, NPC_AF_MATCH_STATX(req->cntr)); cntr 2082 drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c u16 cntr = NPC_MCAM_ENTRY_INVALID; cntr 2127 drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c cntr = cntr_rsp.cntr; cntr 2135 drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c npc_map_mcam_entry_and_cntr(rvu, mcam, blkaddr, entry, cntr); cntr 2139 drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c rsp->cntr = cntr; cntr 697 drivers/perf/xgene_pmu.c int cntr; cntr 699 drivers/perf/xgene_pmu.c cntr = find_first_zero_bit(pmu_dev->cntr_assign_mask, cntr 701 drivers/perf/xgene_pmu.c if (cntr == pmu_dev->max_counters) cntr 703 drivers/perf/xgene_pmu.c set_bit(cntr, pmu_dev->cntr_assign_mask); cntr 705 drivers/perf/xgene_pmu.c return cntr; cntr 708 drivers/perf/xgene_pmu.c static void clear_avail_cntr(struct xgene_pmu_dev *pmu_dev, int cntr) cntr 710 drivers/perf/xgene_pmu.c clear_bit(cntr, pmu_dev->cntr_assign_mask); cntr 43 drivers/pwm/pwm-rockchip.c unsigned long cntr; cntr 231 drivers/pwm/pwm-rockchip.c .cntr = 0x00, cntr 244 drivers/pwm/pwm-rockchip.c .cntr = 0x00, cntr 258 drivers/pwm/pwm-rockchip.c .cntr = 0x0c, cntr 272 drivers/pwm/pwm-rockchip.c .cntr = 0x00, cntr 48 drivers/scsi/a2091.c unsigned short cntr = CNTR_PDMD | CNTR_INTEN; cntr 84 drivers/scsi/a2091.c cntr |= CNTR_DDIR; cntr 89 drivers/scsi/a2091.c regs->CNTR = cntr; cntr 116 drivers/scsi/a2091.c unsigned short cntr = CNTR_PDMD; cntr 119 drivers/scsi/a2091.c cntr |= CNTR_DDIR; cntr 122 drivers/scsi/a2091.c regs->CNTR = cntr; cntr 52 drivers/scsi/a3000.c unsigned short cntr = CNTR_PDMD | CNTR_INTEN; cntr 83 drivers/scsi/a3000.c cntr |= CNTR_DDIR; cntr 88 drivers/scsi/a3000.c regs->CNTR = cntr; cntr 118 drivers/scsi/a3000.c unsigned short cntr = CNTR_PDMD; cntr 121 drivers/scsi/a3000.c cntr |= CNTR_DDIR; cntr 123 drivers/scsi/a3000.c regs->CNTR = cntr; cntr 57 drivers/scsi/gvp11.c unsigned short cntr = GVP11_DMAC_INT_ENABLE; cntr 120 drivers/scsi/gvp11.c cntr |= GVP11_DMAC_DIR_WRITE; cntr 123 drivers/scsi/gvp11.c regs->CNTR = cntr; cntr 480 drivers/usb/class/cdc-wdm.c int rv, cntr; cntr 489 drivers/usb/class/cdc-wdm.c cntr = READ_ONCE(desc->length); cntr 490 drivers/usb/class/cdc-wdm.c if (cntr == 0) { cntr 555 drivers/usb/class/cdc-wdm.c cntr = desc->length; cntr 559 drivers/usb/class/cdc-wdm.c if (cntr > count) cntr 560 drivers/usb/class/cdc-wdm.c cntr = count; cntr 561 drivers/usb/class/cdc-wdm.c rv = copy_to_user(buffer, desc->ubuf, cntr); cntr 569 drivers/usb/class/cdc-wdm.c for (i = 0; i < desc->length - cntr; i++) cntr 570 drivers/usb/class/cdc-wdm.c desc->ubuf[i] = desc->ubuf[i + cntr]; cntr 572 drivers/usb/class/cdc-wdm.c desc->length -= cntr; cntr 579 drivers/usb/class/cdc-wdm.c rv = cntr; cntr 74 drivers/video/fbdev/sh7760fb.c unsigned short cntr = ioread16(par->base + LDCNTR); cntr 80 drivers/video/fbdev/sh7760fb.c cntr = LDCNTR_DON2 | LDCNTR_DON; cntr 84 drivers/video/fbdev/sh7760fb.c cntr = LDCNTR_DON2; cntr 92 drivers/video/fbdev/sh7760fb.c iowrite16(cntr, par->base + LDCNTR);