cn68xx            253 arch/mips/cavium-octeon/executive/cvmx-helper.c 		switch (mode.cn68xx.mode) {
cn68xx            369 arch/mips/cavium-octeon/executive/octeon-model.c 		if (fus_dat2.cn68xx.nocrypto && fus_dat3.cn61xx.nozip)
cn68xx            371 arch/mips/cavium-octeon/executive/octeon-model.c 		else if (fus_dat2.cn68xx.dorm_crypto)
cn68xx            375 arch/mips/cavium-octeon/executive/octeon-model.c 		else if (fus_dat2.cn68xx.nocrypto)
cn68xx            703 arch/mips/include/asm/octeon/cvmx-fpa-defs.h 	} cn68xx;
cn68xx            492 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h 	} cn68xx;
cn68xx           1838 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h 	} cn68xx;
cn68xx           2055 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h 	} cn68xx;
cn68xx            217 arch/mips/include/asm/octeon/cvmx-iob-defs.h 	} cn68xx;
cn68xx            347 arch/mips/include/asm/octeon/cvmx-iob-defs.h 	} cn68xx;
cn68xx            497 arch/mips/include/asm/octeon/cvmx-iob-defs.h 	} cn68xx;
cn68xx            542 arch/mips/include/asm/octeon/cvmx-iob-defs.h 	} cn68xx;
cn68xx            757 arch/mips/include/asm/octeon/cvmx-iob-defs.h 	} cn68xx;
cn68xx            869 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h 	} cn68xx;
cn68xx           1546 arch/mips/include/asm/octeon/cvmx-mio-defs.h 	} cn68xx;
cn68xx           2925 arch/mips/include/asm/octeon/cvmx-mio-defs.h 	} cn68xx;
cn68xx           3102 arch/mips/include/asm/octeon/cvmx-mio-defs.h 	} cn68xx;
cn68xx           3189 arch/mips/include/asm/octeon/cvmx-mio-defs.h 	} cn68xx;
cn68xx            811 arch/mips/include/asm/octeon/cvmx-pip-defs.h 	} cn68xx;
cn68xx           1678 arch/mips/include/asm/octeon/cvmx-pip-defs.h 	} cn68xx;
cn68xx            278 arch/mips/include/asm/octeon/cvmx-pko-defs.h 	} cn68xx;
cn68xx            324 arch/mips/include/asm/octeon/cvmx-pko-defs.h 	} cn68xx;
cn68xx            609 arch/mips/include/asm/octeon/cvmx-pko-defs.h 	} cn68xx;
cn68xx            759 arch/mips/include/asm/octeon/cvmx-pko-defs.h 	} cn68xx;
cn68xx            887 arch/mips/include/asm/octeon/cvmx-pko-defs.h 	} cn68xx;
cn68xx           1408 arch/mips/include/asm/octeon/cvmx-pko-defs.h 	} cn68xx;
cn68xx            126 arch/mips/include/asm/octeon/cvmx-sli-defs.h 	} cn68xx;
cn68xx            449 arch/mips/include/asm/octeon/cvmx-wqe.h 	} cn68xx;
cn68xx            503 arch/mips/include/asm/octeon/cvmx-wqe.h 	} cn68xx;
cn68xx            623 arch/mips/include/asm/octeon/cvmx-wqe.h 		grp = work->word1.cn68xx.grp;
cn68xx            633 arch/mips/include/asm/octeon/cvmx-wqe.h 		work->word1.cn68xx.grp = grp;
cn68xx            643 arch/mips/include/asm/octeon/cvmx-wqe.h 		qos = work->word1.cn68xx.qos;
cn68xx            653 arch/mips/include/asm/octeon/cvmx-wqe.h 		work->word1.cn68xx.qos = qos;
cn68xx            678 arch/mips/pci/pcie-octeon.c 		pmas->cn68xx.ba++;
cn68xx           1350 arch/mips/pci/pcie-octeon.c 		mem_access_subid.cn68xx.ba = 0;
cn68xx             69 drivers/net/ethernet/cavium/liquidio/cn68xx_device.c 	struct octeon_cn6xxx *cn68xx = (struct octeon_cn6xxx *)oct->chip;
cn68xx             81 drivers/net/ethernet/cavium/liquidio/cn68xx_device.c 	if (CFG_GET_IS_SLI_BP_ON(cn68xx->conf))
cn68xx            126 drivers/net/ethernet/cavium/liquidio/cn68xx_device.c 	struct octeon_cn6xxx *cn68xx = (struct octeon_cn6xxx *)oct->chip;
cn68xx            139 drivers/net/ethernet/cavium/liquidio/cn68xx_device.c 	spin_lock_init(&cn68xx->lock_for_droq_int_enb_reg);
cn68xx            165 drivers/net/ethernet/cavium/liquidio/cn68xx_device.c 	cn68xx->conf = (struct octeon_config *)
cn68xx            167 drivers/net/ethernet/cavium/liquidio/cn68xx_device.c 	if (!cn68xx->conf) {
cn68xx             68 drivers/staging/octeon/ethernet-rx.c 		port = work->word0.pip.cn68xx.pknd;
cn68xx            264 drivers/staging/octeon/ethernet-rx.c 			port = work->word0.pip.cn68xx.pknd;
cn68xx            137 drivers/staging/octeon/octeon-stubs.h 	} cn68xx;
cn68xx            162 drivers/staging/octeon/octeon-stubs.h 	} cn68xx;