cmxucr 862 drivers/net/wan/fsl_ucc_hdlc.c memcpy_fromio(priv->cmxucr, qe_mux_reg->cmxucr, 4 * sizeof(u32)); cmxucr 869 drivers/net/wan/fsl_ucc_hdlc.c memcpy_toio(qe_mux_reg->cmxucr, priv->cmxucr, 4 * sizeof(u32)); cmxucr 114 drivers/net/wan/fsl_ucc_hdlc.h u32 cmxucr[4]; cmxucr 89 drivers/soc/fsl/qe/ucc.c static void get_cmxucr_reg(unsigned int ucc_num, __be32 __iomem **cmxucr, cmxucr 95 drivers/soc/fsl/qe/ucc.c *cmxucr = &qe_immr->qmx.cmxucr[cmx]; cmxucr 101 drivers/soc/fsl/qe/ucc.c __be32 __iomem *cmxucr; cmxucr 109 drivers/soc/fsl/qe/ucc.c get_cmxucr_reg(ucc_num, &cmxucr, ®_num, &shift); cmxucr 112 drivers/soc/fsl/qe/ucc.c setbits32(cmxucr, mask << shift); cmxucr 114 drivers/soc/fsl/qe/ucc.c clrbits32(cmxucr, mask << shift); cmxucr 122 drivers/soc/fsl/qe/ucc.c __be32 __iomem *cmxucr; cmxucr 135 drivers/soc/fsl/qe/ucc.c get_cmxucr_reg(ucc_num, &cmxucr, ®_num, &shift); cmxucr 210 drivers/soc/fsl/qe/ucc.c clrsetbits_be32(cmxucr, QE_CMXUCR_TX_CLK_SRC_MASK << shift, cmxucr 97 include/soc/fsl/qe/immap_qe.h __be32 cmxucr[4]; /* CMX UCCx clock route registers */