cmdr              374 drivers/crypto/hifn_795x.c 	struct hifn_desc	cmdr[HIFN_D_CMD_RSIZE + 1];
cmdr              886 drivers/crypto/hifn_795x.c 		dma->cmdr[i].p = __cpu_to_le32(dptr +
cmdr              893 drivers/crypto/hifn_795x.c 	dma->cmdr[HIFN_D_CMD_RSIZE].p = __cpu_to_le32(dptr +
cmdr              894 drivers/crypto/hifn_795x.c 			offsetof(struct hifn_dma, cmdr[0]));
cmdr              983 drivers/crypto/hifn_795x.c 				offsetof(struct hifn_dma, cmdr[0]));
cmdr             1208 drivers/crypto/hifn_795x.c 	dma->cmdr[dma->cmdi].l = __cpu_to_le32(cmd_len | HIFN_D_VALID |
cmdr             1212 drivers/crypto/hifn_795x.c 		dma->cmdr[dma->cmdi].l = __cpu_to_le32(
cmdr             1217 drivers/crypto/hifn_795x.c 		dma->cmdr[dma->cmdi - 1].l |= __cpu_to_le32(HIFN_D_VALID);
cmdr             1749 drivers/crypto/hifn_795x.c 		if (dma->cmdr[i].l & __cpu_to_le32(HIFN_D_VALID))
cmdr              242 drivers/dma/stm32-mdma.c 	u32 cmdr;
cmdr              686 drivers/dma/stm32-mdma.c 	dev_dbg(chan2dev(chan), "CMDR:    0x%08x\n\n", node->hwdesc->cmdr);
cmdr              712 drivers/dma/stm32-mdma.c 	hwdesc->cmdr = config->mask_data;
cmdr             1029 drivers/dma/stm32-mdma.c 		hwdesc->cmdr = 0;
cmdr             1143 drivers/dma/stm32-mdma.c 	stm32_mdma_write(dmadev, STM32_MDMA_CMDR(id), hwdesc->cmdr);
cmdr              568 drivers/i3c/master/i3c-master-cdns.c 		u32 cmdr, rx_len, id;
cmdr              570 drivers/i3c/master/i3c-master-cdns.c 		cmdr = readl(master->regs + CMDR);
cmdr              571 drivers/i3c/master/i3c-master-cdns.c 		id = CMDR_CMDID(cmdr);
cmdr              577 drivers/i3c/master/i3c-master-cdns.c 		cmd = &xfer->cmds[CMDR_CMDID(cmdr)];
cmdr              578 drivers/i3c/master/i3c-master-cdns.c 		rx_len = min_t(u32, CMDR_XFER_BYTES(cmdr), cmd->rx_len);
cmdr              580 drivers/i3c/master/i3c-master-cdns.c 		cmd->error = CMDR_ERROR(cmdr);
cmdr              765 drivers/mmc/host/atmel-mci.c 	u32		cmdr;
cmdr              769 drivers/mmc/host/atmel-mci.c 	cmdr = ATMCI_CMDR_CMDNB(cmd->opcode);
cmdr              773 drivers/mmc/host/atmel-mci.c 			cmdr |= ATMCI_CMDR_RSPTYP_136BIT;
cmdr              775 drivers/mmc/host/atmel-mci.c 			cmdr |= ATMCI_CMDR_RSPTYP_48BIT;
cmdr              783 drivers/mmc/host/atmel-mci.c 	cmdr |= ATMCI_CMDR_MAXLAT_64CYC;
cmdr              786 drivers/mmc/host/atmel-mci.c 		cmdr |= ATMCI_CMDR_OPDCMD;
cmdr              790 drivers/mmc/host/atmel-mci.c 		cmdr |= ATMCI_CMDR_START_XFER;
cmdr              793 drivers/mmc/host/atmel-mci.c 			cmdr |= ATMCI_CMDR_SDIO_BLOCK;
cmdr              796 drivers/mmc/host/atmel-mci.c 				cmdr |= ATMCI_CMDR_MULTI_BLOCK;
cmdr              798 drivers/mmc/host/atmel-mci.c 				cmdr |= ATMCI_CMDR_BLOCK;
cmdr              802 drivers/mmc/host/atmel-mci.c 			cmdr |= ATMCI_CMDR_TRDIR_READ;
cmdr              805 drivers/mmc/host/atmel-mci.c 	return cmdr;
cmdr              252 drivers/mmc/host/dw_mmc.c 	u32 cmdr;
cmdr              255 drivers/mmc/host/dw_mmc.c 	cmdr = cmd->opcode;
cmdr              262 drivers/mmc/host/dw_mmc.c 		cmdr |= SDMMC_CMD_STOP;
cmdr              264 drivers/mmc/host/dw_mmc.c 		cmdr |= SDMMC_CMD_PRV_DAT_WAIT;
cmdr              270 drivers/mmc/host/dw_mmc.c 		cmdr |= SDMMC_CMD_VOLT_SWITCH;
cmdr              296 drivers/mmc/host/dw_mmc.c 		cmdr |= SDMMC_CMD_RESP_EXP;
cmdr              298 drivers/mmc/host/dw_mmc.c 			cmdr |= SDMMC_CMD_RESP_LONG;
cmdr              302 drivers/mmc/host/dw_mmc.c 		cmdr |= SDMMC_CMD_RESP_CRC;
cmdr              305 drivers/mmc/host/dw_mmc.c 		cmdr |= SDMMC_CMD_DAT_EXP;
cmdr              307 drivers/mmc/host/dw_mmc.c 			cmdr |= SDMMC_CMD_DAT_WR;
cmdr              311 drivers/mmc/host/dw_mmc.c 		cmdr |= SDMMC_CMD_USE_HOLD_REG;
cmdr              313 drivers/mmc/host/dw_mmc.c 	return cmdr;
cmdr              319 drivers/mmc/host/dw_mmc.c 	u32 cmdr;
cmdr              325 drivers/mmc/host/dw_mmc.c 	cmdr = cmd->opcode;
cmdr              328 drivers/mmc/host/dw_mmc.c 	if (cmdr == MMC_READ_SINGLE_BLOCK ||
cmdr              329 drivers/mmc/host/dw_mmc.c 	    cmdr == MMC_READ_MULTIPLE_BLOCK ||
cmdr              330 drivers/mmc/host/dw_mmc.c 	    cmdr == MMC_WRITE_BLOCK ||
cmdr              331 drivers/mmc/host/dw_mmc.c 	    cmdr == MMC_WRITE_MULTIPLE_BLOCK ||
cmdr              332 drivers/mmc/host/dw_mmc.c 	    cmdr == MMC_SEND_TUNING_BLOCK ||
cmdr              333 drivers/mmc/host/dw_mmc.c 	    cmdr == MMC_SEND_TUNING_BLOCK_HS200) {
cmdr              337 drivers/mmc/host/dw_mmc.c 	} else if (cmdr == SD_IO_RW_EXTENDED) {
cmdr              346 drivers/mmc/host/dw_mmc.c 	cmdr = stop->opcode | SDMMC_CMD_STOP |
cmdr              350 drivers/mmc/host/dw_mmc.c 		cmdr |= SDMMC_CMD_USE_HOLD_REG;
cmdr              352 drivers/mmc/host/dw_mmc.c 	return cmdr;
cmdr              139 drivers/tty/serial/sunsab.c 		writeb(SAB82532_CMDR_RFRD, &up->regs->w.cmdr);
cmdr              153 drivers/tty/serial/sunsab.c 		writeb(SAB82532_CMDR_RMC, &up->regs->w.cmdr);
cmdr              281 drivers/tty/serial/sunsab.c 	writeb(SAB82532_CMDR_XF, &up->regs->w.cmdr);
cmdr              468 drivers/tty/serial/sunsab.c 	writeb(SAB82532_CMDR_XF, &up->regs->w.cmdr);
cmdr              546 drivers/tty/serial/sunsab.c 	writeb(SAB82532_CMDR_RRES, &up->regs->w.cmdr);
cmdr              548 drivers/tty/serial/sunsab.c 	writeb(SAB82532_CMDR_XRES, &up->regs->w.cmdr);
cmdr               43 drivers/tty/serial/sunsab.h 	u8	cmdr;		/* Command Register			*/