cmd_sts           192 drivers/net/ethernet/marvell/mv643xx_eth.c 	u32 cmd_sts;		/* Descriptor command status		*/
cmd_sts           200 drivers/net/ethernet/marvell/mv643xx_eth.c 	u32 cmd_sts;		/* Command/status field			*/
cmd_sts           206 drivers/net/ethernet/marvell/mv643xx_eth.c 	u32 cmd_sts;		/* Descriptor command status		*/
cmd_sts           214 drivers/net/ethernet/marvell/mv643xx_eth.c 	u32 cmd_sts;		/* Command/status field			*/
cmd_sts           514 drivers/net/ethernet/marvell/mv643xx_eth.c 		unsigned int cmd_sts;
cmd_sts           520 drivers/net/ethernet/marvell/mv643xx_eth.c 		cmd_sts = rx_desc->cmd_sts;
cmd_sts           521 drivers/net/ethernet/marvell/mv643xx_eth.c 		if (cmd_sts & BUFFER_OWNED_BY_DMA)
cmd_sts           557 drivers/net/ethernet/marvell/mv643xx_eth.c 		if ((cmd_sts & (RX_FIRST_DESC | RX_LAST_DESC | ERROR_SUMMARY))
cmd_sts           567 drivers/net/ethernet/marvell/mv643xx_eth.c 		if (cmd_sts & LAYER_4_CHECKSUM_OK)
cmd_sts           578 drivers/net/ethernet/marvell/mv643xx_eth.c 		if ((cmd_sts & (RX_FIRST_DESC | RX_LAST_DESC)) !=
cmd_sts           585 drivers/net/ethernet/marvell/mv643xx_eth.c 		if (cmd_sts & ERROR_SUMMARY)
cmd_sts           635 drivers/net/ethernet/marvell/mv643xx_eth.c 		rx_desc->cmd_sts = BUFFER_OWNED_BY_DMA | RX_ENABLE_INTERRUPT;
cmd_sts           735 drivers/net/ethernet/marvell/mv643xx_eth.c 	u32 cmd_sts;
cmd_sts           765 drivers/net/ethernet/marvell/mv643xx_eth.c 	cmd_sts = BUFFER_OWNED_BY_DMA;
cmd_sts           768 drivers/net/ethernet/marvell/mv643xx_eth.c 		cmd_sts |= ZERO_PADDING | TX_LAST_DESC;
cmd_sts           771 drivers/net/ethernet/marvell/mv643xx_eth.c 			cmd_sts |= TX_ENABLE_INTERRUPT;
cmd_sts           773 drivers/net/ethernet/marvell/mv643xx_eth.c 	desc->cmd_sts = cmd_sts;
cmd_sts           788 drivers/net/ethernet/marvell/mv643xx_eth.c 	u32 cmd_sts;
cmd_sts           804 drivers/net/ethernet/marvell/mv643xx_eth.c 	cmd_sts = cmd_csum | BUFFER_OWNED_BY_DMA  | TX_FIRST_DESC |
cmd_sts           811 drivers/net/ethernet/marvell/mv643xx_eth.c 		*first_cmd_sts = cmd_sts;
cmd_sts           813 drivers/net/ethernet/marvell/mv643xx_eth.c 		desc->cmd_sts = cmd_sts;
cmd_sts           877 drivers/net/ethernet/marvell/mv643xx_eth.c 	first_tx_desc->cmd_sts = first_cmd_sts;
cmd_sts           917 drivers/net/ethernet/marvell/mv643xx_eth.c 			desc->cmd_sts = BUFFER_OWNED_BY_DMA |
cmd_sts           921 drivers/net/ethernet/marvell/mv643xx_eth.c 			desc->cmd_sts = BUFFER_OWNED_BY_DMA;
cmd_sts           939 drivers/net/ethernet/marvell/mv643xx_eth.c 	u32 cmd_sts;
cmd_sts           943 drivers/net/ethernet/marvell/mv643xx_eth.c 	cmd_sts = 0;
cmd_sts           952 drivers/net/ethernet/marvell/mv643xx_eth.c 	ret = skb_tx_csum(mp, skb, &l4i_chk, &cmd_sts, skb->len);
cmd_sts           955 drivers/net/ethernet/marvell/mv643xx_eth.c 	cmd_sts |= TX_FIRST_DESC | GEN_CRC | BUFFER_OWNED_BY_DMA;
cmd_sts           967 drivers/net/ethernet/marvell/mv643xx_eth.c 		cmd_sts |= ZERO_PADDING | TX_LAST_DESC | TX_ENABLE_INTERRUPT;
cmd_sts           982 drivers/net/ethernet/marvell/mv643xx_eth.c 	desc->cmd_sts = cmd_sts;
cmd_sts          1072 drivers/net/ethernet/marvell/mv643xx_eth.c 		u32 cmd_sts;
cmd_sts          1079 drivers/net/ethernet/marvell/mv643xx_eth.c 		cmd_sts = desc->cmd_sts;
cmd_sts          1081 drivers/net/ethernet/marvell/mv643xx_eth.c 		if (cmd_sts & BUFFER_OWNED_BY_DMA) {
cmd_sts          1084 drivers/net/ethernet/marvell/mv643xx_eth.c 			desc->cmd_sts = cmd_sts & ~BUFFER_OWNED_BY_DMA;
cmd_sts          1108 drivers/net/ethernet/marvell/mv643xx_eth.c 		if (cmd_sts & TX_ENABLE_INTERRUPT) {
cmd_sts          1115 drivers/net/ethernet/marvell/mv643xx_eth.c 		if (cmd_sts & ERROR_SUMMARY) {
cmd_sts          2081 drivers/net/ethernet/marvell/mv643xx_eth.c 		txd->cmd_sts = 0;
cmd_sts           176 drivers/net/ethernet/marvell/pxa168_eth.c 	u32 cmd_sts;		/* Descriptor command status            */
cmd_sts           184 drivers/net/ethernet/marvell/pxa168_eth.c 	u32 cmd_sts;		/* Command/status field                 */
cmd_sts           332 drivers/net/ethernet/marvell/pxa168_eth.c 		p_used_rx_desc->cmd_sts = BUF_OWNED_BY_DMA | RX_EN_INT;
cmd_sts           700 drivers/net/ethernet/marvell/pxa168_eth.c 	u32 cmd_sts;
cmd_sts           713 drivers/net/ethernet/marvell/pxa168_eth.c 		cmd_sts = desc->cmd_sts;
cmd_sts           714 drivers/net/ethernet/marvell/pxa168_eth.c 		if (!force && (cmd_sts & BUF_OWNED_BY_DMA)) {
cmd_sts           730 drivers/net/ethernet/marvell/pxa168_eth.c 		if (cmd_sts & TX_ERROR) {
cmd_sts           774 drivers/net/ethernet/marvell/pxa168_eth.c 		unsigned int cmd_sts;
cmd_sts           782 drivers/net/ethernet/marvell/pxa168_eth.c 		cmd_sts = rx_desc->cmd_sts;
cmd_sts           784 drivers/net/ethernet/marvell/pxa168_eth.c 		if (cmd_sts & (BUF_OWNED_BY_DMA))
cmd_sts           811 drivers/net/ethernet/marvell/pxa168_eth.c 		if (((cmd_sts & (RX_FIRST_DESC | RX_LAST_DESC)) !=
cmd_sts           813 drivers/net/ethernet/marvell/pxa168_eth.c 		    || (cmd_sts & RX_ERROR)) {
cmd_sts           816 drivers/net/ethernet/marvell/pxa168_eth.c 			if ((cmd_sts & (RX_FIRST_DESC | RX_LAST_DESC)) !=
cmd_sts           822 drivers/net/ethernet/marvell/pxa168_eth.c 			if (cmd_sts & RX_ERROR)
cmd_sts          1272 drivers/net/ethernet/marvell/pxa168_eth.c 	desc->cmd_sts = BUF_OWNED_BY_DMA | TX_GEN_CRC | TX_FIRST_DESC |