cmcv              881 arch/ia64/include/asm/sal.h 	u64 cmcv;
cmcv              637 arch/ia64/kernel/mca.c 	cmcv_reg_t	cmcv;
cmcv              639 arch/ia64/kernel/mca.c 	cmcv.cmcv_regval	= 0;
cmcv              640 arch/ia64/kernel/mca.c 	cmcv.cmcv_mask		= 1;        /* Mask/disable interrupt at first */
cmcv              641 arch/ia64/kernel/mca.c 	cmcv.cmcv_vector	= IA64_CMC_VECTOR;
cmcv              642 arch/ia64/kernel/mca.c 	ia64_setreg(_IA64_REG_CR_CMCV, cmcv.cmcv_regval);
cmcv              666 arch/ia64/kernel/mca.c 	cmcv_reg_t	cmcv;
cmcv              668 arch/ia64/kernel/mca.c 	cmcv.cmcv_regval = ia64_getreg(_IA64_REG_CR_CMCV);
cmcv              670 arch/ia64/kernel/mca.c 	cmcv.cmcv_mask = 1; /* Mask/disable interrupt */
cmcv              671 arch/ia64/kernel/mca.c 	ia64_setreg(_IA64_REG_CR_CMCV, cmcv.cmcv_regval);
cmcv              674 arch/ia64/kernel/mca.c 		       __func__, smp_processor_id(), cmcv.cmcv_vector);
cmcv              692 arch/ia64/kernel/mca.c 	cmcv_reg_t	cmcv;
cmcv              694 arch/ia64/kernel/mca.c 	cmcv.cmcv_regval = ia64_getreg(_IA64_REG_CR_CMCV);
cmcv              696 arch/ia64/kernel/mca.c 	cmcv.cmcv_mask = 0; /* Unmask/enable interrupt */
cmcv              697 arch/ia64/kernel/mca.c 	ia64_setreg(_IA64_REG_CR_CMCV, cmcv.cmcv_regval);
cmcv              700 arch/ia64/kernel/mca.c 		       __func__, smp_processor_id(), cmcv.cmcv_vector);
cmcv              962 drivers/s390/cio/chsc.c chsc_initialize_cmg_chars(struct channel_path *chp, u8 cmcv,
cmcv              969 drivers/s390/cio/chsc.c 		if (cmcv & mask)
cmcv              994 drivers/s390/cio/chsc.c 		u32 cmcv : 5;
cmcv             1037 drivers/s390/cio/chsc.c 	chsc_initialize_cmg_chars(chp, scmc_area->cmcv,