cm_ofs            876 drivers/gpu/ipu-v3/ipu-common.c 	unsigned long cm_ofs;
cm_ofs            892 drivers/gpu/ipu-v3/ipu-common.c 	.cm_ofs = 0x1e000000,
cm_ofs            908 drivers/gpu/ipu-v3/ipu-common.c 	.cm_ofs = 0x06000000,
cm_ofs            924 drivers/gpu/ipu-v3/ipu-common.c 	.cm_ofs = 0x00200000,
cm_ofs           1012 drivers/gpu/ipu-v3/ipu-common.c 	ret = ipu_dc_init(ipu, dev, ipu_base + devtype->cm_ofs +
cm_ofs           1020 drivers/gpu/ipu-v3/ipu-common.c 			devtype->cm_ofs + IPU_CM_DMFC_REG_OFS, ipu_clk);
cm_ofs           1033 drivers/gpu/ipu-v3/ipu-common.c 			devtype->cm_ofs + IPU_CM_SMFC_REG_OFS);
cm_ofs           1422 drivers/gpu/ipu-v3/ipu-common.c 			ipu_base + devtype->cm_ofs);
cm_ofs           1424 drivers/gpu/ipu-v3/ipu-common.c 			ipu_base + devtype->cm_ofs + IPU_CM_IDMAC_REG_OFS);
cm_ofs           1442 drivers/gpu/ipu-v3/ipu-common.c 			ipu_base + devtype->cm_ofs + IPU_CM_DC_REG_OFS);
cm_ofs           1444 drivers/gpu/ipu-v3/ipu-common.c 			ipu_base + devtype->cm_ofs + IPU_CM_IC_REG_OFS);
cm_ofs           1446 drivers/gpu/ipu-v3/ipu-common.c 			ipu_base + devtype->cm_ofs + IPU_CM_DMFC_REG_OFS);
cm_ofs           1451 drivers/gpu/ipu-v3/ipu-common.c 			ipu_base + devtype->cm_ofs, PAGE_SIZE);
cm_ofs           1453 drivers/gpu/ipu-v3/ipu-common.c 			ipu_base + devtype->cm_ofs + IPU_CM_IDMAC_REG_OFS,