clr_mask 868 drivers/dma/qcom/bam_dma.c u32 clr_mask = 0, srcs = 0; clr_mask 882 drivers/dma/qcom/bam_dma.c clr_mask = readl_relaxed(bam_addr(bdev, 0, BAM_IRQ_STTS)); clr_mask 890 drivers/dma/qcom/bam_dma.c writel_relaxed(clr_mask, bam_addr(bdev, 0, BAM_IRQ_CLR)); clr_mask 80 drivers/hwmon/lm75.c u8 clr_mask; clr_mask 124 drivers/hwmon/lm75.c .clr_mask = 1 << 5, /* not one-shot mode */ clr_mask 129 drivers/hwmon/lm75.c .clr_mask = 3 << 5, clr_mask 138 drivers/hwmon/lm75.c .clr_mask = 3 << 5, clr_mask 147 drivers/hwmon/lm75.c .clr_mask = 3 << 5, clr_mask 211 drivers/hwmon/lm75.c .clr_mask = 1 << 7, /* not one-shot mode */ clr_mask 221 drivers/hwmon/lm75.c .clr_mask = 1 << 7, /* not one-shot mode */ clr_mask 230 drivers/hwmon/lm75.c .clr_mask = 1 << 7, /* not one-shot mode */ clr_mask 239 drivers/hwmon/lm75.c .clr_mask = 1 << 7, /* not one-shot mode*/ clr_mask 248 drivers/hwmon/lm75.c .clr_mask = 1 << 7, /* no one-shot mode*/ clr_mask 256 drivers/hwmon/lm75.c .clr_mask = 1 << 7, /* not one-shot mode*/ clr_mask 265 drivers/hwmon/lm75.c .clr_mask = 1 << 7, /* not one-shot mode*/ clr_mask 274 drivers/hwmon/lm75.c .clr_mask = 1 << 7, /* not one-shot mode*/ clr_mask 282 drivers/hwmon/lm75.c .clr_mask = 1 << 7 | 3 << 5, clr_mask 291 drivers/hwmon/lm75.c .clr_mask = 1 << 5, /*not one-shot mode*/ clr_mask 303 drivers/hwmon/lm75.c u8 clr_mask) clr_mask 307 drivers/hwmon/lm75.c clr_mask |= LM75_SHUTDOWN; clr_mask 308 drivers/hwmon/lm75.c value = data->current_conf & ~clr_mask; clr_mask 594 drivers/hwmon/lm75.c data->params->clr_mask); clr_mask 229 drivers/infiniband/hw/mthca/mthca_dev.h u32 clr_mask; clr_mask 397 drivers/infiniband/hw/mthca/mthca_eq.c if (dev->eq_table.clr_mask) clr_mask 398 drivers/infiniband/hw/mthca/mthca_eq.c writel(dev->eq_table.clr_mask, dev->eq_table.clr_int); clr_mask 437 drivers/infiniband/hw/mthca/mthca_eq.c if (dev->eq_table.clr_mask) clr_mask 438 drivers/infiniband/hw/mthca/mthca_eq.c writel(dev->eq_table.clr_mask, dev->eq_table.clr_int); clr_mask 785 drivers/infiniband/hw/mthca/mthca_eq.c dev->eq_table.clr_mask = 0; clr_mask 787 drivers/infiniband/hw/mthca/mthca_eq.c dev->eq_table.clr_mask = clr_mask 135 drivers/media/i2c/ad9389b.c u8 clr_mask, u8 val_mask) clr_mask 137 drivers/media/i2c/ad9389b.c ad9389b_wr(sd, reg, (ad9389b_rd(sd, reg) & clr_mask) | val_mask); clr_mask 212 drivers/media/i2c/adv7511-v4l2.c static inline void adv7511_wr_and_or(struct v4l2_subdev *sd, u8 reg, u8 clr_mask, u8 val_mask) clr_mask 214 drivers/media/i2c/adv7511-v4l2.c adv7511_wr(sd, reg, (adv7511_rd(sd, reg) & clr_mask) | val_mask); clr_mask 301 drivers/media/i2c/adv7511-v4l2.c static inline void adv7511_pktmem_wr_and_or(struct v4l2_subdev *sd, u8 reg, u8 clr_mask, u8 val_mask) clr_mask 303 drivers/media/i2c/adv7511-v4l2.c adv7511_pktmem_wr(sd, reg, (adv7511_pktmem_rd(sd, reg) & clr_mask) | val_mask); clr_mask 98 drivers/media/i2c/ths8200.c uint8_t clr_mask, uint8_t val_mask) clr_mask 100 drivers/media/i2c/ths8200.c ths8200_write(sd, reg, (ths8200_read(sd, reg) & clr_mask) | val_mask); clr_mask 94 drivers/mfd/ssbi.c static int ssbi_wait_mask(struct ssbi *ssbi, u32 set_mask, u32 clr_mask) clr_mask 101 drivers/mfd/ssbi.c if (((val & set_mask) == set_mask) && ((val & clr_mask) == 0)) clr_mask 855 drivers/net/ethernet/mellanox/mlx4/eq.c writel(priv->eq_table.clr_mask, priv->eq_table.clr_int); clr_mask 1207 drivers/net/ethernet/mellanox/mlx4/eq.c priv->eq_table.clr_mask = clr_mask 692 drivers/net/ethernet/mellanox/mlx4/mlx4.h u32 clr_mask; clr_mask 201 drivers/net/ethernet/microchip/encx24j600-regmap.c unsigned int clr_mask = mask & ~val; clr_mask 214 drivers/net/ethernet/microchip/encx24j600-regmap.c if ((clr_mask & 0xff) && (ret == 0)) clr_mask 215 drivers/net/ethernet/microchip/encx24j600-regmap.c ret = regmap_encx24j600_sfr_clr_bits(ctx, reg, clr_mask); clr_mask 217 drivers/net/ethernet/microchip/encx24j600-regmap.c clr_mask = (clr_mask & 0xff00) >> 8; clr_mask 219 drivers/net/ethernet/microchip/encx24j600-regmap.c if ((clr_mask & 0xff) && (ret == 0)) clr_mask 220 drivers/net/ethernet/microchip/encx24j600-regmap.c ret = regmap_encx24j600_sfr_clr_bits(ctx, reg + 1, clr_mask); clr_mask 214 drivers/net/phy/bcm7xxx.c int set_mask, int clr_mask) clr_mask 222 drivers/net/phy/bcm7xxx.c v &= ~clr_mask;