clr_boot          280 arch/mips/cavium-octeon/executive/cvmx-spi.c 	spxx_trn4_ctl.s.clr_boot = 1;
clr_boot          534 arch/mips/cavium-octeon/executive/cvmx-spi.c 	spxx_trn4_ctl.s.clr_boot = 1;
clr_boot          428 arch/mips/include/asm/octeon/cvmx-spxx-defs.h 		uint64_t clr_boot:1;
clr_boot          438 arch/mips/include/asm/octeon/cvmx-spxx-defs.h 		uint64_t clr_boot:1;