CcPwrDynRm1        63 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint32_t    CcPwrDynRm1;
CcPwrDynRm1        93 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint32_t    CcPwrDynRm1;
CcPwrDynRm1       101 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint32_t    CcPwrDynRm1;
CcPwrDynRm1        61 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint32_t    CcPwrDynRm1;
CcPwrDynRm1        89 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint32_t    CcPwrDynRm1;
CcPwrDynRm1        96 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint32_t    CcPwrDynRm1;
CcPwrDynRm1        59 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h 	uint32_t    CcPwrDynRm1;
CcPwrDynRm1        87 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint32_t    CcPwrDynRm1;
CcPwrDynRm1        94 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h 	uint32_t    CcPwrDynRm1;
CcPwrDynRm1        91 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint32_t    CcPwrDynRm1;
CcPwrDynRm1       114 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint32_t    CcPwrDynRm1;
CcPwrDynRm1       123 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint32_t    CcPwrDynRm1;
CcPwrDynRm1        91 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint32_t    CcPwrDynRm1;
CcPwrDynRm1       119 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint32_t    CcPwrDynRm1;
CcPwrDynRm1       128 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint32_t    CcPwrDynRm1;
CcPwrDynRm1       119 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint32_t    CcPwrDynRm1;
CcPwrDynRm1       151 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint32_t    CcPwrDynRm1;
CcPwrDynRm1       159 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint32_t    CcPwrDynRm1;
CcPwrDynRm1       435 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 	level->CcPwrDynRm1 = 0;
CcPwrDynRm1       464 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 		CONVERT_FROM_HOST_TO_SMC_UL(level->CcPwrDynRm1);
CcPwrDynRm1       953 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 	state->CcPwrDynRm1 = 0;
CcPwrDynRm1       983 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 	CONVERT_FROM_HOST_TO_SMC_UL(state->CcPwrDynRm1);
CcPwrDynRm1      1427 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 	table->ACPILevel.CcPwrDynRm1 = 0;
CcPwrDynRm1      1440 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 	CONVERT_FROM_HOST_TO_SMC_UL(table->ACPILevel.CcPwrDynRm1);
CcPwrDynRm1       806 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 	state->CcPwrDynRm1 = 0;
CcPwrDynRm1       816 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 		CONVERT_FROM_HOST_TO_SMC_UL(state->CcPwrDynRm1);
CcPwrDynRm1       968 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 	level->CcPwrDynRm1 = 0;
CcPwrDynRm1       998 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 	CONVERT_FROM_HOST_TO_SMC_UL(level->CcPwrDynRm1);
CcPwrDynRm1      1361 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 	table->ACPILevel.CcPwrDynRm1 = 0;
CcPwrDynRm1      1373 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 	CONVERT_FROM_HOST_TO_SMC_UL(table->ACPILevel.CcPwrDynRm1);
CcPwrDynRm1       722 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 	state->CcPwrDynRm1 = 0;
CcPwrDynRm1       752 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 	CONVERT_FROM_HOST_TO_SMC_UL(state->CcPwrDynRm1);
CcPwrDynRm1       921 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 	graphic_level->CcPwrDynRm1 = 0;
CcPwrDynRm1       953 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 		CONVERT_FROM_HOST_TO_SMC_UL(graphic_level->CcPwrDynRm1);
CcPwrDynRm1      1475 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 	table->ACPILevel.CcPwrDynRm1 = 0;
CcPwrDynRm1      1489 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 	CONVERT_FROM_HOST_TO_SMC_UL(table->ACPILevel.CcPwrDynRm1);
CcPwrDynRm1       742 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 	state->CcPwrDynRm1 = 0;
CcPwrDynRm1       754 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 	CONVERT_FROM_HOST_TO_SMC_UL(state->CcPwrDynRm1);
CcPwrDynRm1       937 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 	level->CcPwrDynRm1 = 0;
CcPwrDynRm1       962 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 	CONVERT_FROM_HOST_TO_SMC_UL(level->CcPwrDynRm1);
CcPwrDynRm1      1229 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 	table->ACPILevel.CcPwrDynRm1 = 0;
CcPwrDynRm1      1234 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 	CONVERT_FROM_HOST_TO_SMC_UL(table->ACPILevel.CcPwrDynRm1);
CcPwrDynRm1       486 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 	state->CcPwrDynRm1 = 0;
CcPwrDynRm1       495 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 	CONVERT_FROM_HOST_TO_SMC_UL(state->CcPwrDynRm1);
CcPwrDynRm1       648 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 	graphic_level->CcPwrDynRm1 = 0;
CcPwrDynRm1       680 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 		CONVERT_FROM_HOST_TO_SMC_UL(graphic_level->CcPwrDynRm1);
CcPwrDynRm1      1224 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 	table->ACPILevel.CcPwrDynRm1 = 0;
CcPwrDynRm1      1238 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 	CONVERT_FROM_HOST_TO_SMC_UL(table->ACPILevel.CcPwrDynRm1);
CcPwrDynRm1       546 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 	state->CcPwrDynRm1 = 0;
CcPwrDynRm1       555 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 	CONVERT_FROM_HOST_TO_SMC_UL(state->CcPwrDynRm1);
CcPwrDynRm1       831 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 	level->CcPwrDynRm1 = 0;
CcPwrDynRm1       846 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 	CONVERT_FROM_HOST_TO_SMC_UL(level->CcPwrDynRm1);
CcPwrDynRm1      1141 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 	table->ACPILevel.CcPwrDynRm1 = 0;
CcPwrDynRm1      1146 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 	CONVERT_FROM_HOST_TO_SMC_UL(table->ACPILevel.CcPwrDynRm1);
CcPwrDynRm1      3035 drivers/gpu/drm/radeon/ci_dpm.c 	table->ACPILevel.CcPwrDynRm1 = 0;
CcPwrDynRm1      3047 drivers/gpu/drm/radeon/ci_dpm.c 	table->ACPILevel.CcPwrDynRm1 = cpu_to_be32(table->ACPILevel.CcPwrDynRm1);
CcPwrDynRm1      3129 drivers/gpu/drm/radeon/ci_dpm.c 	state->CcPwrDynRm1 = 0;
CcPwrDynRm1      3153 drivers/gpu/drm/radeon/ci_dpm.c 	state->CcPwrDynRm1 = cpu_to_be32(state->CcPwrDynRm1);
CcPwrDynRm1      3247 drivers/gpu/drm/radeon/ci_dpm.c 	graphic_level->CcPwrDynRm1 = 0;
CcPwrDynRm1      3271 drivers/gpu/drm/radeon/ci_dpm.c 	graphic_level->CcPwrDynRm1 = cpu_to_be32(graphic_level->CcPwrDynRm1);
CcPwrDynRm1       119 drivers/gpu/drm/radeon/smu7_discrete.h     uint32_t    CcPwrDynRm1;
CcPwrDynRm1       151 drivers/gpu/drm/radeon/smu7_discrete.h     uint32_t    CcPwrDynRm1;
CcPwrDynRm1       159 drivers/gpu/drm/radeon/smu7_discrete.h     uint32_t    CcPwrDynRm1;