clock_delay_div_4 104 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c uint16_t clock_delay_div_4) clock_delay_div_4 107 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c uint32_t scl_retry_max = I2C_SW_TIMEOUT_DELAY / clock_delay_div_4; clock_delay_div_4 109 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c udelay(clock_delay_div_4); clock_delay_div_4 115 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c udelay(clock_delay_div_4); clock_delay_div_4 125 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c uint16_t clock_delay_div_4, clock_delay_div_4 134 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c udelay(clock_delay_div_4); clock_delay_div_4 138 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c udelay(clock_delay_div_4); clock_delay_div_4 142 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c if (!wait_for_scl_high_sw(ctx, ddc_handle, clock_delay_div_4)) clock_delay_div_4 155 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c udelay(clock_delay_div_4); clock_delay_div_4 159 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c udelay(clock_delay_div_4); clock_delay_div_4 163 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c if (!wait_for_scl_high_sw(ctx, ddc_handle, clock_delay_div_4)) clock_delay_div_4 170 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c udelay(clock_delay_div_4 << 1); clock_delay_div_4 174 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c udelay(clock_delay_div_4 << 1); clock_delay_div_4 182 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c uint16_t clock_delay_div_4, clock_delay_div_4 197 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c if (!wait_for_scl_high_sw(ctx, ddc_handle, clock_delay_div_4)) clock_delay_div_4 205 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c udelay(clock_delay_div_4 << 1); clock_delay_div_4 214 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c udelay(clock_delay_div_4); clock_delay_div_4 222 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c udelay(clock_delay_div_4); clock_delay_div_4 226 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c if (!wait_for_scl_high_sw(ctx, ddc_handle, clock_delay_div_4)) clock_delay_div_4 231 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c udelay(clock_delay_div_4); clock_delay_div_4 235 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c udelay(clock_delay_div_4); clock_delay_div_4 242 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c uint16_t clock_delay_div_4) clock_delay_div_4 252 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c udelay(clock_delay_div_4); clock_delay_div_4 256 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c udelay(clock_delay_div_4); clock_delay_div_4 260 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c if (!wait_for_scl_high_sw(ctx, ddc_handle, clock_delay_div_4)) clock_delay_div_4 266 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c udelay(clock_delay_div_4); clock_delay_div_4 279 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c uint16_t clock_delay_div_4, clock_delay_div_4 286 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c if (!write_byte_sw(ctx, ddc_handle, clock_delay_div_4, address)) clock_delay_div_4 290 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c if (!write_byte_sw(ctx, ddc_handle, clock_delay_div_4, data[i])) clock_delay_div_4 301 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c uint16_t clock_delay_div_4, clock_delay_div_4 308 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c if (!write_byte_sw(ctx, ddc_handle, clock_delay_div_4, address)) clock_delay_div_4 312 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c if (!read_byte_sw(ctx, ddc_handle, clock_delay_div_4, data + i, clock_delay_div_4 326 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c uint16_t clock_delay_div_4) clock_delay_div_4 336 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c udelay(clock_delay_div_4); clock_delay_div_4 346 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c udelay(clock_delay_div_4); clock_delay_div_4 350 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c if (!wait_for_scl_high_sw(ctx, ddc_handle, clock_delay_div_4)) clock_delay_div_4 355 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c udelay(clock_delay_div_4); clock_delay_div_4 359 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c udelay(clock_delay_div_4); clock_delay_div_4 430 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c uint16_t clock_delay_div_4 = engine->clock_delay >> 2; clock_delay_div_4 434 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c bool result = start_sync_sw(engine->ctx, ddc, clock_delay_div_4); clock_delay_div_4 442 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c result = i2c_write_sw(engine->ctx, ddc, clock_delay_div_4, clock_delay_div_4 447 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c result = i2c_read_sw(engine->ctx, ddc, clock_delay_div_4, clock_delay_div_4 461 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c if (!stop_sync_sw(engine->ctx, ddc, clock_delay_div_4))