clock_ctl 206 arch/mips/ath25/ar2315.c static unsigned __init ar2315_sys_clk(u32 clock_ctl) clock_ctl 220 arch/mips/ath25/ar2315.c switch (clock_ctl & AR2315_CPUCLK_CLK_SEL_M) { clock_ctl 236 arch/mips/ath25/ar2315.c cpu_div = ATH25_REG_MS(clock_ctl, AR2315_CPUCLK_CLK_DIV); clock_ctl 679 drivers/memstick/host/jmb38x_ms.c unsigned int clock_ctl = CLOCK_CONTROL_BY_MMIO, clock_delay = 0; clock_ctl 725 drivers/memstick/host/jmb38x_ms.c clock_ctl |= CLOCK_CONTROL_40MHZ; clock_ctl 732 drivers/memstick/host/jmb38x_ms.c clock_ctl |= CLOCK_CONTROL_40MHZ; clock_ctl 738 drivers/memstick/host/jmb38x_ms.c clock_ctl |= CLOCK_CONTROL_50MHZ; clock_ctl 745 drivers/memstick/host/jmb38x_ms.c writel(clock_ctl, host->addr + CLOCK_CONTROL); clock_ctl 6157 drivers/net/ethernet/broadcom/tg3.c u32 clock_ctl = tr32(TG3_EAV_REF_CLCK_CTL); clock_ctl 6159 drivers/net/ethernet/broadcom/tg3.c tw32(TG3_EAV_REF_CLCK_CTL, clock_ctl | TG3_EAV_REF_CLCK_CTL_STOP); clock_ctl 6162 drivers/net/ethernet/broadcom/tg3.c tw32_f(TG3_EAV_REF_CLCK_CTL, clock_ctl | TG3_EAV_REF_CLCK_CTL_RESUME); clock_ctl 6278 drivers/net/ethernet/broadcom/tg3.c u32 clock_ctl; clock_ctl 6291 drivers/net/ethernet/broadcom/tg3.c clock_ctl = tr32(TG3_EAV_REF_CLCK_CTL); clock_ctl 6292 drivers/net/ethernet/broadcom/tg3.c clock_ctl &= ~TG3_EAV_CTL_TSYNC_GPIO_MASK; clock_ctl 6320 drivers/net/ethernet/broadcom/tg3.c clock_ctl | TG3_EAV_CTL_TSYNC_WDOG0); clock_ctl 6323 drivers/net/ethernet/broadcom/tg3.c tw32(TG3_EAV_REF_CLCK_CTL, clock_ctl);