clock_comp        224 drivers/net/ethernet/cavium/common/cavium_ptp.c 	u64 clock_comp;
clock_comp        276 drivers/net/ethernet/cavium/common/cavium_ptp.c 	clock_comp = ((u64)1000000000ull << 32) / clock->clock_rate;
clock_comp        277 drivers/net/ethernet/cavium/common/cavium_ptp.c 	writeq(clock_comp, clock->reg_base + PTP_CLOCK_COMP);
clock_comp       1708 drivers/net/ethernet/cavium/liquidio/lio_main.c 	u64 clock_comp, cfg;
clock_comp       1710 drivers/net/ethernet/cavium/liquidio/lio_main.c 	clock_comp = (u64)NSEC_PER_SEC << 32;
clock_comp       1711 drivers/net/ethernet/cavium/liquidio/lio_main.c 	do_div(clock_comp, oct->coproc_clock_rate);
clock_comp       1712 drivers/net/ethernet/cavium/liquidio/lio_main.c 	lio_pci_writeq(oct, clock_comp, CN6XXX_MIO_PTP_CLOCK_COMP);
clock_comp        713 drivers/net/ethernet/cavium/octeon/octeon_mgmt.c 			u64 clock_comp = (NSEC_PER_SEC << 32) /	octeon_get_io_clock_rate();
clock_comp        715 drivers/net/ethernet/cavium/octeon/octeon_mgmt.c 				cvmx_write_csr(CVMX_MIO_PTP_CLOCK_COMP, clock_comp);
clock_comp        718 drivers/net/ethernet/cavium/octeon/octeon_mgmt.c 				    (NSEC_PER_SEC << 32) / clock_comp);
clock_comp        721 drivers/net/ethernet/cavium/octeon/octeon_mgmt.c 			u64 clock_comp = cvmx_read_csr(CVMX_MIO_PTP_CLOCK_COMP);
clock_comp        724 drivers/net/ethernet/cavium/octeon/octeon_mgmt.c 				    ptp.s.ext_clk_in, (NSEC_PER_SEC << 32) / clock_comp);