clksel 183 arch/arm/mach-imx/mach-imx6q.c u32 clksel; clksel 208 arch/arm/mach-imx/mach-imx6q.c clksel = clk_is_match(ptp_clk, enet_ref) ? clksel 215 arch/arm/mach-imx/mach-imx6q.c clksel); clksel 67 arch/mips/ralink/rt3883.c u32 clksel; clksel 71 arch/mips/ralink/rt3883.c clksel = ((syscfg0 >> RT3883_SYSCFG0_CPUCLK_SHIFT) & clksel 75 arch/mips/ralink/rt3883.c switch (clksel) { clksel 57 drivers/clk/clk-qoriq.c struct clockgen_sourceinfo clksel[NUM_MUX_PARENTS]; clksel 789 drivers/clk/clk-qoriq.c u32 clksel; clksel 794 drivers/clk/clk-qoriq.c clksel = hwc->parent_to_clksel[idx]; clksel 795 drivers/clk/clk-qoriq.c cg_out(hwc->cg, (clksel << CLKSEL_SHIFT) & CLKSEL_MASK, hwc->reg); clksel 803 drivers/clk/clk-qoriq.c u32 clksel; clksel 806 drivers/clk/clk-qoriq.c clksel = (cg_in(hwc->cg, hwc->reg) & CLKSEL_MASK) >> CLKSEL_SHIFT; clksel 808 drivers/clk/clk-qoriq.c ret = hwc->clksel_to_parent[clksel]; clksel 836 drivers/clk/clk-qoriq.c if (!(hwc->info->clksel[idx].flags & CLKSEL_VALID)) clksel 839 drivers/clk/clk-qoriq.c pll = hwc->info->clksel[idx].pll; clksel 840 drivers/clk/clk-qoriq.c div = hwc->info->clksel[idx].div; clksel 873 drivers/clk/clk-qoriq.c if (hwc->info->clksel[i].flags & CLKSEL_80PCT && clksel 912 drivers/clk/clk-qoriq.c u32 clksel; clksel 932 drivers/clk/clk-qoriq.c clksel = (cg_in(cg, hwc->reg) & CLKSEL_MASK) >> CLKSEL_SHIFT; clksel 933 drivers/clk/clk-qoriq.c div = get_pll_div(cg, hwc, clksel); clksel 109 drivers/clk/rockchip/clk-cpu.c const struct rockchip_cpuclk_clksel *clksel = &rate->divs[i]; clksel 111 drivers/clk/rockchip/clk-cpu.c if (!clksel->reg) clksel 115 drivers/clk/rockchip/clk-cpu.c __func__, clksel->reg, clksel->val); clksel 116 drivers/clk/rockchip/clk-cpu.c writel(clksel->val, cpuclk->reg_base + clksel->reg); clksel 479 drivers/clocksource/timer-cadence-ttc.c int clksel, ret; clksel 506 drivers/clocksource/timer-cadence-ttc.c clksel = readl_relaxed(timer_baseaddr + TTC_CLK_CNTRL_OFFSET); clksel 507 drivers/clocksource/timer-cadence-ttc.c clksel = !!(clksel & TTC_CLK_CNTRL_CSRC_MASK); clksel 508 drivers/clocksource/timer-cadence-ttc.c clk_cs = of_clk_get(timer, clksel); clksel 514 drivers/clocksource/timer-cadence-ttc.c clksel = readl_relaxed(timer_baseaddr + 4 + TTC_CLK_CNTRL_OFFSET); clksel 515 drivers/clocksource/timer-cadence-ttc.c clksel = !!(clksel & TTC_CLK_CNTRL_CSRC_MASK); clksel 516 drivers/clocksource/timer-cadence-ttc.c clk_ce = of_clk_get(timer, clksel); clksel 187 drivers/gpu/drm/rcar-du/rcar_lvds.c u32 clksel; clksel 192 drivers/gpu/drm/rcar-du/rcar_lvds.c u32 clksel, bool dot_clock_only) clksel 300 drivers/gpu/drm/rcar-du/rcar_lvds.c pll->clksel = clksel; clksel 334 drivers/gpu/drm/rcar-du/rcar_lvds.c lvdpllcr = LVDPLLCR_PLLON | pll.clksel | LVDPLLCR_CLKOUT clksel 138 drivers/gpu/drm/zte/zx_vou.c u32 clksel; clksel 145 drivers/gpu/drm/zte/zx_vou.c .clksel = VOU_CLK_GL0_SEL, clksel 149 drivers/gpu/drm/zte/zx_vou.c .clksel = VOU_CLK_GL1_SEL, clksel 157 drivers/gpu/drm/zte/zx_vou.c .clksel = VOU_CLK_VL0_SEL, clksel 161 drivers/gpu/drm/zte/zx_vou.c .clksel = VOU_CLK_VL1_SEL, clksel 165 drivers/gpu/drm/zte/zx_vou.c .clksel = VOU_CLK_VL2_SEL, clksel 618 drivers/gpu/drm/zte/zx_vou.c zx_writel_mask(vou->vouctl + VOU_CLK_SEL, bits->clksel, 0); clksel 622 drivers/gpu/drm/zte/zx_vou.c zx_writel_mask(vou->vouctl + VOU_CLK_SEL, bits->clksel, clksel 623 drivers/gpu/drm/zte/zx_vou.c bits->clksel); clksel 387 drivers/mfd/asic3.c unsigned long clksel = 0; clksel 397 drivers/mfd/asic3.c clksel |= CLOCK_SEL_CX; clksel 399 drivers/mfd/asic3.c clksel); clksel 957 drivers/mfd/asic3.c unsigned long clksel; clksel 986 drivers/mfd/asic3.c clksel = 0; clksel 987 drivers/mfd/asic3.c asic3_write_register(asic, ASIC3_OFFSET(CLOCK, SEL), clksel); clksel 133 drivers/mmc/host/dw_mmc-exynos.c u32 clksel; clksel 137 drivers/mmc/host/dw_mmc-exynos.c clksel = mci_readl(host, CLKSEL64); clksel 139 drivers/mmc/host/dw_mmc-exynos.c clksel = mci_readl(host, CLKSEL); clksel 141 drivers/mmc/host/dw_mmc-exynos.c clksel = (clksel & ~SDMMC_CLKSEL_TIMING_MASK) | timing; clksel 145 drivers/mmc/host/dw_mmc-exynos.c mci_writel(host, CLKSEL64, clksel); clksel 147 drivers/mmc/host/dw_mmc-exynos.c mci_writel(host, CLKSEL, clksel); clksel 156 drivers/mmc/host/dw_mmc-exynos.c if (!SDMMC_CLKSEL_GET_DRV_WD3(clksel) && host->slot) clksel 203 drivers/mmc/host/dw_mmc-exynos.c u32 clksel; clksel 212 drivers/mmc/host/dw_mmc-exynos.c clksel = mci_readl(host, CLKSEL64); clksel 214 drivers/mmc/host/dw_mmc-exynos.c clksel = mci_readl(host, CLKSEL); clksel 216 drivers/mmc/host/dw_mmc-exynos.c if (clksel & SDMMC_CLKSEL_WAKEUP_INT) { clksel 219 drivers/mmc/host/dw_mmc-exynos.c mci_writel(host, CLKSEL64, clksel); clksel 221 drivers/mmc/host/dw_mmc-exynos.c mci_writel(host, CLKSEL, clksel); clksel 298 drivers/mmc/host/dw_mmc-exynos.c u32 timing = ios->timing, clksel; clksel 303 drivers/mmc/host/dw_mmc-exynos.c clksel = SDMMC_CLKSEL_UP_SAMPLE( clksel 308 drivers/mmc/host/dw_mmc-exynos.c clksel = priv->ddr_timing; clksel 315 drivers/mmc/host/dw_mmc-exynos.c clksel = (priv->sdr_timing & 0xfff8ffff) | clksel 319 drivers/mmc/host/dw_mmc-exynos.c clksel = (priv->ddr_timing & 0xfff8ffff) | clksel 323 drivers/mmc/host/dw_mmc-exynos.c clksel = priv->sdr_timing; clksel 327 drivers/mmc/host/dw_mmc-exynos.c dw_mci_exynos_set_clksel_timing(host, clksel); clksel 403 drivers/mmc/host/dw_mmc-exynos.c u32 clksel; clksel 408 drivers/mmc/host/dw_mmc-exynos.c clksel = mci_readl(host, CLKSEL64); clksel 410 drivers/mmc/host/dw_mmc-exynos.c clksel = mci_readl(host, CLKSEL); clksel 411 drivers/mmc/host/dw_mmc-exynos.c clksel = SDMMC_CLKSEL_UP_SAMPLE(clksel, sample); clksel 414 drivers/mmc/host/dw_mmc-exynos.c mci_writel(host, CLKSEL64, clksel); clksel 416 drivers/mmc/host/dw_mmc-exynos.c mci_writel(host, CLKSEL, clksel); clksel 422 drivers/mmc/host/dw_mmc-exynos.c u32 clksel; clksel 427 drivers/mmc/host/dw_mmc-exynos.c clksel = mci_readl(host, CLKSEL64); clksel 429 drivers/mmc/host/dw_mmc-exynos.c clksel = mci_readl(host, CLKSEL); clksel 431 drivers/mmc/host/dw_mmc-exynos.c sample = (clksel + 1) & 0x7; clksel 432 drivers/mmc/host/dw_mmc-exynos.c clksel = SDMMC_CLKSEL_UP_SAMPLE(clksel, sample); clksel 436 drivers/mmc/host/dw_mmc-exynos.c mci_writel(host, CLKSEL64, clksel); clksel 438 drivers/mmc/host/dw_mmc-exynos.c mci_writel(host, CLKSEL, clksel); clksel 38 drivers/mmc/host/dw_mmc-zx.c unsigned int clksel; clksel 54 drivers/mmc/host/dw_mmc-zx.c ret = regmap_read(sysc_base, LB_AON_EMMC_CFG_REG1, &clksel); clksel 59 drivers/mmc/host/dw_mmc-zx.c clksel &= ~CLK_SAMP_DELAY_MASK; clksel 60 drivers/mmc/host/dw_mmc-zx.c clksel |= CLK_SAMP_DELAY(delay); clksel 62 drivers/mmc/host/dw_mmc-zx.c clksel &= ~READ_DQS_DELAY_MASK; clksel 63 drivers/mmc/host/dw_mmc-zx.c clksel |= READ_DQS_DELAY(delay); clksel 66 drivers/mmc/host/dw_mmc-zx.c regmap_write(sysc_base, LB_AON_EMMC_CFG_REG1, clksel); clksel 74 drivers/mmc/host/dw_mmc-zx.c ret = regmap_read(sysc_base, LB_AON_EMMC_CFG_REG2, &clksel); clksel 78 drivers/mmc/host/dw_mmc-zx.c } while (--loop && !(clksel & ZX_DLL_LOCKED));