clkcfg 130 drivers/clk/pxa/clk-pxa.c unsigned int unused, clkcfg; clkcfg 134 drivers/clk/pxa/clk-pxa.c asm("mrc p14, 0, %0, c6, c0, 0" : "=r" (clkcfg)); clkcfg 135 drivers/clk/pxa/clk-pxa.c clkcfg &= ~CLKCFG_TURBO & ~CLKCFG_HALFTURBO; clkcfg 137 drivers/clk/pxa/clk-pxa.c clkcfg |= CLKCFG_TURBO; clkcfg 138 drivers/clk/pxa/clk-pxa.c clkcfg |= CLKCFG_FCS; clkcfg 147 drivers/clk/pxa/clk-pxa.c : "=&r" (unused) : "r" (clkcfg)); clkcfg 156 drivers/clk/pxa/clk-pxa.c unsigned int clkcfg = freq->clkcfg; clkcfg 200 drivers/clk/pxa/clk-pxa.c : "r" (mdrefr), "r" (clkcfg), "r" (preset_mdrefr), clkcfg 139 drivers/clk/pxa/clk-pxa.h unsigned int clkcfg; clkcfg 196 drivers/clk/pxa/clk-pxa25x.c unsigned long clkcfg; clkcfg 199 drivers/clk/pxa/clk-pxa25x.c asm("mrc\tp14, 0, %0, c6, c0, 0" : "=r" (clkcfg)); clkcfg 200 drivers/clk/pxa/clk-pxa25x.c t = clkcfg & (1 << 0); clkcfg 239 drivers/clk/pxa/clk-pxa25x.c unsigned long clkcfg, cccr = readl(CCCR); clkcfg 242 drivers/clk/pxa/clk-pxa25x.c asm("mrc\tp14, 0, %0, c6, c0, 0" : "=r" (clkcfg)); clkcfg 243 drivers/clk/pxa/clk-pxa25x.c t = clkcfg & (1 << 0); clkcfg 226 drivers/clk/pxa/clk-pxa27x.c unsigned long clkcfg; clkcfg 231 drivers/clk/pxa/clk-pxa27x.c asm("mrc\tp14, 0, %0, c6, c0, 0" : "=r" (clkcfg)); clkcfg 232 drivers/clk/pxa/clk-pxa27x.c t = clkcfg & (1 << 0); clkcfg 233 drivers/clk/pxa/clk-pxa27x.c ht = clkcfg & (1 << 2); clkcfg 323 drivers/clk/pxa/clk-pxa27x.c unsigned long clkcfg; clkcfg 331 drivers/clk/pxa/clk-pxa27x.c asm("mrc\tp14, 0, %0, c6, c0, 0" : "=r" (clkcfg)); clkcfg 332 drivers/clk/pxa/clk-pxa27x.c t = clkcfg & (1 << 0); clkcfg 333 drivers/clk/pxa/clk-pxa27x.c ht = clkcfg & (1 << 2); clkcfg 383 drivers/clk/pxa/clk-pxa27x.c unsigned long clkcfg; clkcfg 388 drivers/clk/pxa/clk-pxa27x.c asm("mrc\tp14, 0, %0, c6, c0, 0" : "=r" (clkcfg)); clkcfg 389 drivers/clk/pxa/clk-pxa27x.c b = clkcfg & (1 << 3); clkcfg 2758 drivers/gpu/drm/i915/display/intel_cdclk.c u32 clkcfg; clkcfg 2761 drivers/gpu/drm/i915/display/intel_cdclk.c clkcfg = I915_READ(CLKCFG); clkcfg 2762 drivers/gpu/drm/i915/display/intel_cdclk.c switch (clkcfg & CLKCFG_FSB_MASK) {