clk_v             375 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 			ATOM_PPLIB_Clock_Voltage_Limit_Table *clk_v =
clk_v             379 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 			if (clk_v->ucNumEntries) {
clk_v             381 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 					le16_to_cpu(clk_v->entries[0].usSclkLow) |
clk_v             382 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 					(clk_v->entries[0].ucSclkHigh << 16);
clk_v             384 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 					le16_to_cpu(clk_v->entries[0].usMclkLow) |
clk_v             385 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 					(clk_v->entries[0].ucMclkHigh << 16);
clk_v             387 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 					le16_to_cpu(clk_v->entries[0].usVddc);
clk_v             389 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 					le16_to_cpu(clk_v->entries[0].usVddci);
clk_v            2953 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	u32 clk_s, clk_v;
clk_v            2973 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		clk_v = (sclk_params.vCG_SPLL_SPREAD_SPECTRUM_2 & CLK_V_MASK) >> CLK_V_SHIFT;
clk_v            2977 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		clk_v >>= 6;
clk_v            2985 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		if (clk_v & ~(SMC_SISLANDS_SPLL_DIV_TABLE_CLKV_MASK >> SMC_SISLANDS_SPLL_DIV_TABLE_CLKV_SHIFT))
clk_v            2995 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		tmp = ((clk_v << SMC_SISLANDS_SPLL_DIV_TABLE_CLKV_SHIFT) & SMC_SISLANDS_SPLL_DIV_TABLE_CLKV_MASK) |
clk_v            5292 drivers/gpu/drm/amd/amdgpu/si_dpm.c 			u32 clk_v = 4 * ss.percentage * fbdiv / (clk_s * 10000);
clk_v            5299 drivers/gpu/drm/amd/amdgpu/si_dpm.c 			cg_spll_spread_spectrum_2 |= CLK_V(clk_v);
clk_v             347 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 			uint32_t clk_v = 4 * ss_info.speed_spectrum_percentage *
clk_v             355 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 					CG_SPLL_SPREAD_SPECTRUM_2, CLKV, clk_v);
clk_v             916 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 			uint32_t clk_v = 4 * ssInfo.speed_spectrum_percentage *
clk_v             924 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 					CG_SPLL_SPREAD_SPECTRUM_2, CLKV, clk_v);
clk_v            3194 drivers/gpu/drm/radeon/ci_dpm.c 			u32 clk_v = 4 * ss.percentage * fbdiv / (clk_s * 10000);
clk_v            3201 drivers/gpu/drm/radeon/ci_dpm.c 			cg_spll_spread_spectrum_2 |= CLK_V(clk_v);
clk_v             563 drivers/gpu/drm/radeon/cypress_dpm.c 			u32 clk_v = ss.percentage *
clk_v             567 drivers/gpu/drm/radeon/cypress_dpm.c 			mpll_ss1 |= CLKV(clk_v);
clk_v            2047 drivers/gpu/drm/radeon/ni_dpm.c 			u32 clk_v = 4 * ss.percentage * fbdiv / (clk_s * 10000);
clk_v            2054 drivers/gpu/drm/radeon/ni_dpm.c 			cg_spll_spread_spectrum_2 |= CLK_V(clk_v);
clk_v            2099 drivers/gpu/drm/radeon/ni_dpm.c 	u32 clk_v;
clk_v            2119 drivers/gpu/drm/radeon/ni_dpm.c 		clk_v = (sclk_params.vCG_SPLL_SPREAD_SPECTRUM_2 & CLK_V_MASK) >> CLK_V_SHIFT;
clk_v            2123 drivers/gpu/drm/radeon/ni_dpm.c 		clk_v >>= 6;
clk_v            2134 drivers/gpu/drm/radeon/ni_dpm.c 		if (clk_v & ~(SMC_NISLANDS_SPLL_DIV_TABLE_CLKV_MASK >> SMC_NISLANDS_SPLL_DIV_TABLE_CLKV_SHIFT))
clk_v            2144 drivers/gpu/drm/radeon/ni_dpm.c 		tmp = ((clk_v << SMC_NISLANDS_SPLL_DIV_TABLE_CLKV_SHIFT) & SMC_NISLANDS_SPLL_DIV_TABLE_CLKV_MASK) |
clk_v            2245 drivers/gpu/drm/radeon/ni_dpm.c 			u32 clk_v = ss.percentage *
clk_v            2249 drivers/gpu/drm/radeon/ni_dpm.c 			mpll_ss1 |= CLKV(clk_v);
clk_v             968 drivers/gpu/drm/radeon/r600_dpm.c 			ATOM_PPLIB_Clock_Voltage_Limit_Table *clk_v =
clk_v             972 drivers/gpu/drm/radeon/r600_dpm.c 			if (clk_v->ucNumEntries) {
clk_v             974 drivers/gpu/drm/radeon/r600_dpm.c 					le16_to_cpu(clk_v->entries[0].usSclkLow) |
clk_v             975 drivers/gpu/drm/radeon/r600_dpm.c 					(clk_v->entries[0].ucSclkHigh << 16);
clk_v             977 drivers/gpu/drm/radeon/r600_dpm.c 					le16_to_cpu(clk_v->entries[0].usMclkLow) |
clk_v             978 drivers/gpu/drm/radeon/r600_dpm.c 					(clk_v->entries[0].ucMclkHigh << 16);
clk_v             980 drivers/gpu/drm/radeon/r600_dpm.c 					le16_to_cpu(clk_v->entries[0].usVddc);
clk_v             982 drivers/gpu/drm/radeon/r600_dpm.c 					le16_to_cpu(clk_v->entries[0].usVddci);
clk_v             322 drivers/gpu/drm/radeon/rv6xx_dpm.c 						   u32 index, u32 clk_v)
clk_v             325 drivers/gpu/drm/radeon/rv6xx_dpm.c 		 CLKV(clk_v), ~CLKV_MASK);
clk_v             346 drivers/gpu/drm/radeon/rv6xx_dpm.c 						   u32 clk_v)
clk_v             348 drivers/gpu/drm/radeon/rv6xx_dpm.c 	WREG32_P(CG_MPLL_SPREAD_SPECTRUM, CLKV(clk_v), ~CLKV_MASK);
clk_v             555 drivers/gpu/drm/radeon/rv6xx_dpm.c 	u32 vco_freq, clk_v, clk_s;
clk_v             566 drivers/gpu/drm/radeon/rv6xx_dpm.c 				clk_v = rv6xx_calculate_spread_spectrum_clk_v(vco_freq,
clk_v             575 drivers/gpu/drm/radeon/rv6xx_dpm.c 				rv6xx_set_engine_spread_spectrum_clk_v(rdev, level, clk_v);
clk_v             658 drivers/gpu/drm/radeon/rv6xx_dpm.c 	u32 vco_freq = 0, clk_v, clk_s;
clk_v             684 drivers/gpu/drm/radeon/rv6xx_dpm.c 				clk_v = rv6xx_calculate_spread_spectrum_clk_v(vco_freq,
clk_v             693 drivers/gpu/drm/radeon/rv6xx_dpm.c 				rv6xx_set_memory_spread_spectrum_clk_v(rdev, clk_v);
clk_v              97 drivers/gpu/drm/radeon/rv730_dpm.c 			u32 clk_v = ss.percentage * fbdiv / (clk_s * 10000);
clk_v             104 drivers/gpu/drm/radeon/rv730_dpm.c 			cg_spll_spread_spectrum_2 |= CLK_V(clk_v);
clk_v             173 drivers/gpu/drm/radeon/rv730_dpm.c 			u32 clk_v = ss.percentage * dividers.fb_div / (clk_s * 10000);
clk_v             180 drivers/gpu/drm/radeon/rv730_dpm.c 			mpll_ss |= CLK_V(clk_v);
clk_v             165 drivers/gpu/drm/radeon/rv740_dpm.c 			u32 clk_v = 4 * ss.percentage * fbdiv / (clk_s * 10000);
clk_v             172 drivers/gpu/drm/radeon/rv740_dpm.c 			cg_spll_spread_spectrum_2 |= CLK_V(clk_v);
clk_v             254 drivers/gpu/drm/radeon/rv740_dpm.c 			u32 clk_v = 0x40000 * ss.percentage *
clk_v             258 drivers/gpu/drm/radeon/rv740_dpm.c 			mpll_ss1 |= CLKV(clk_v);
clk_v             544 drivers/gpu/drm/radeon/rv770_dpm.c 			u32 clk_v = ss.percentage * fbdiv / (clk_s * 10000);
clk_v             551 drivers/gpu/drm/radeon/rv770_dpm.c 			cg_spll_spread_spectrum_2 |= CLKV(clk_v);
clk_v            2854 drivers/gpu/drm/radeon/si_dpm.c 	u32 clk_s, clk_v;
clk_v            2875 drivers/gpu/drm/radeon/si_dpm.c 		clk_v = (sclk_params.vCG_SPLL_SPREAD_SPECTRUM_2 & CLK_V_MASK) >> CLK_V_SHIFT;
clk_v            2879 drivers/gpu/drm/radeon/si_dpm.c 		clk_v >>= 6;
clk_v            2887 drivers/gpu/drm/radeon/si_dpm.c 		if (clk_v & ~(SMC_SISLANDS_SPLL_DIV_TABLE_CLKV_MASK >> SMC_SISLANDS_SPLL_DIV_TABLE_CLKV_SHIFT))
clk_v            2897 drivers/gpu/drm/radeon/si_dpm.c 		tmp = ((clk_v << SMC_SISLANDS_SPLL_DIV_TABLE_CLKV_SHIFT) & SMC_SISLANDS_SPLL_DIV_TABLE_CLKV_MASK) |
clk_v            4830 drivers/gpu/drm/radeon/si_dpm.c 			u32 clk_v = 4 * ss.percentage * fbdiv / (clk_s * 10000);
clk_v            4837 drivers/gpu/drm/radeon/si_dpm.c 			cg_spll_spread_spectrum_2 |= CLK_V(clk_v);