clk_s 2953 drivers/gpu/drm/amd/amdgpu/si_dpm.c u32 clk_s, clk_v; clk_s 2972 drivers/gpu/drm/amd/amdgpu/si_dpm.c clk_s = (sclk_params.vCG_SPLL_SPREAD_SPECTRUM & CLK_S_MASK) >> CLK_S_SHIFT; clk_s 2983 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (clk_s & ~(SMC_SISLANDS_SPLL_DIV_TABLE_CLKS_MASK >> SMC_SISLANDS_SPLL_DIV_TABLE_CLKS_SHIFT)) clk_s 2996 drivers/gpu/drm/amd/amdgpu/si_dpm.c ((clk_s << SMC_SISLANDS_SPLL_DIV_TABLE_CLKS_SHIFT) & SMC_SISLANDS_SPLL_DIV_TABLE_CLKS_MASK); clk_s 5291 drivers/gpu/drm/amd/amdgpu/si_dpm.c u32 clk_s = reference_clock * 5 / (reference_divider * ss.rate); clk_s 5292 drivers/gpu/drm/amd/amdgpu/si_dpm.c u32 clk_v = 4 * ss.percentage * fbdiv / (clk_s * 10000); clk_s 5295 drivers/gpu/drm/amd/amdgpu/si_dpm.c cg_spll_spread_spectrum |= CLK_S(clk_s); clk_s 345 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c uint32_t clk_s = ref_clock * 5 / clk_s 348 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c fbdiv / (clk_s * 10000); clk_s 351 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c CG_SPLL_SPREAD_SPECTRUM, CLKS, clk_s); clk_s 913 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c uint32_t clk_s = ref_clock * 5 / clk_s 917 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c fbdiv / (clk_s * 10000); clk_s 920 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c CG_SPLL_SPREAD_SPECTRUM, CLKS, clk_s); clk_s 3193 drivers/gpu/drm/radeon/ci_dpm.c u32 clk_s = reference_clock * 5 / (reference_divider * ss.rate); clk_s 3194 drivers/gpu/drm/radeon/ci_dpm.c u32 clk_v = 4 * ss.percentage * fbdiv / (clk_s * 10000); clk_s 3197 drivers/gpu/drm/radeon/ci_dpm.c cg_spll_spread_spectrum |= CLK_S(clk_s); clk_s 562 drivers/gpu/drm/radeon/cypress_dpm.c u32 clk_s = reference_clock * 5 / (decoded_ref * ss.rate); clk_s 564 drivers/gpu/drm/radeon/cypress_dpm.c (0x4000 * dividers.whole_fb_div + 0x800 * dividers.frac_fb_div) / (clk_s * 625); clk_s 570 drivers/gpu/drm/radeon/cypress_dpm.c mpll_ss2 |= CLKS(clk_s); clk_s 2046 drivers/gpu/drm/radeon/ni_dpm.c u32 clk_s = reference_clock * 5 / (reference_divider * ss.rate); clk_s 2047 drivers/gpu/drm/radeon/ni_dpm.c u32 clk_v = 4 * ss.percentage * fbdiv / (clk_s * 10000); clk_s 2050 drivers/gpu/drm/radeon/ni_dpm.c cg_spll_spread_spectrum |= CLK_S(clk_s); clk_s 2098 drivers/gpu/drm/radeon/ni_dpm.c u32 clk_s; clk_s 2118 drivers/gpu/drm/radeon/ni_dpm.c clk_s = (sclk_params.vCG_SPLL_SPREAD_SPECTRUM & CLK_S_MASK) >> CLK_S_SHIFT; clk_s 2128 drivers/gpu/drm/radeon/ni_dpm.c if (clk_s & ~(SMC_NISLANDS_SPLL_DIV_TABLE_CLKS_MASK >> SMC_NISLANDS_SPLL_DIV_TABLE_CLKS_SHIFT)) clk_s 2131 drivers/gpu/drm/radeon/ni_dpm.c if (clk_s & ~(SMC_NISLANDS_SPLL_DIV_TABLE_CLKS_MASK >> SMC_NISLANDS_SPLL_DIV_TABLE_CLKS_SHIFT)) clk_s 2145 drivers/gpu/drm/radeon/ni_dpm.c ((clk_s << SMC_NISLANDS_SPLL_DIV_TABLE_CLKS_SHIFT) & SMC_NISLANDS_SPLL_DIV_TABLE_CLKS_MASK); clk_s 2244 drivers/gpu/drm/radeon/ni_dpm.c u32 clk_s = reference_clock * 5 / (decoded_ref * ss.rate); clk_s 2246 drivers/gpu/drm/radeon/ni_dpm.c (0x4000 * dividers.whole_fb_div + 0x800 * dividers.frac_fb_div) / (clk_s * 625); clk_s 2252 drivers/gpu/drm/radeon/ni_dpm.c mpll_ss2 |= CLKS(clk_s); clk_s 315 drivers/gpu/drm/radeon/rv6xx_dpm.c u32 index, u32 clk_s) clk_s 318 drivers/gpu/drm/radeon/rv6xx_dpm.c CLKS(clk_s), ~CLKS_MASK); clk_s 340 drivers/gpu/drm/radeon/rv6xx_dpm.c u32 clk_s) clk_s 342 drivers/gpu/drm/radeon/rv6xx_dpm.c WREG32_P(CG_MPLL_SPREAD_SPECTRUM, CLKS(clk_s), ~CLKS_MASK); clk_s 555 drivers/gpu/drm/radeon/rv6xx_dpm.c u32 vco_freq, clk_v, clk_s; clk_s 572 drivers/gpu/drm/radeon/rv6xx_dpm.c clk_s = rv6xx_calculate_spread_spectrum_clk_s(ss.rate, clk_s 576 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_set_engine_spread_spectrum_clk_s(rdev, level, clk_s); clk_s 658 drivers/gpu/drm/radeon/rv6xx_dpm.c u32 vco_freq = 0, clk_v, clk_s; clk_s 690 drivers/gpu/drm/radeon/rv6xx_dpm.c clk_s = rv6xx_calculate_spread_spectrum_clk_s(ss.rate, clk_s 694 drivers/gpu/drm/radeon/rv6xx_dpm.c rv6xx_set_memory_spread_spectrum_clk_s(rdev, clk_s); clk_s 96 drivers/gpu/drm/radeon/rv730_dpm.c u32 clk_s = reference_clock * 5 / (reference_divider * ss.rate); clk_s 97 drivers/gpu/drm/radeon/rv730_dpm.c u32 clk_v = ss.percentage * fbdiv / (clk_s * 10000); clk_s 100 drivers/gpu/drm/radeon/rv730_dpm.c cg_spll_spread_spectrum |= CLK_S(clk_s); clk_s 172 drivers/gpu/drm/radeon/rv730_dpm.c u32 clk_s = reference_clock * 5 / (reference_divider * ss.rate); clk_s 173 drivers/gpu/drm/radeon/rv730_dpm.c u32 clk_v = ss.percentage * dividers.fb_div / (clk_s * 10000); clk_s 176 drivers/gpu/drm/radeon/rv730_dpm.c mpll_ss |= CLK_S(clk_s); clk_s 164 drivers/gpu/drm/radeon/rv740_dpm.c u32 clk_s = reference_clock * 5 / (reference_divider * ss.rate); clk_s 165 drivers/gpu/drm/radeon/rv740_dpm.c u32 clk_v = 4 * ss.percentage * fbdiv / (clk_s * 10000); clk_s 168 drivers/gpu/drm/radeon/rv740_dpm.c cg_spll_spread_spectrum |= CLK_S(clk_s); clk_s 253 drivers/gpu/drm/radeon/rv740_dpm.c u32 clk_s = reference_clock * 5 / (decoded_ref * ss.rate); clk_s 255 drivers/gpu/drm/radeon/rv740_dpm.c (dividers.whole_fb_div + (dividers.frac_fb_div / 8)) / (clk_s * 10000); clk_s 261 drivers/gpu/drm/radeon/rv740_dpm.c mpll_ss2 |= CLKS(clk_s); clk_s 543 drivers/gpu/drm/radeon/rv770_dpm.c u32 clk_s = reference_clock * 5 / (reference_divider * ss.rate); clk_s 544 drivers/gpu/drm/radeon/rv770_dpm.c u32 clk_v = ss.percentage * fbdiv / (clk_s * 10000); clk_s 547 drivers/gpu/drm/radeon/rv770_dpm.c cg_spll_spread_spectrum |= CLKS(clk_s); clk_s 2854 drivers/gpu/drm/radeon/si_dpm.c u32 clk_s, clk_v; clk_s 2874 drivers/gpu/drm/radeon/si_dpm.c clk_s = (sclk_params.vCG_SPLL_SPREAD_SPECTRUM & CLK_S_MASK) >> CLK_S_SHIFT; clk_s 2885 drivers/gpu/drm/radeon/si_dpm.c if (clk_s & ~(SMC_SISLANDS_SPLL_DIV_TABLE_CLKS_MASK >> SMC_SISLANDS_SPLL_DIV_TABLE_CLKS_SHIFT)) clk_s 2898 drivers/gpu/drm/radeon/si_dpm.c ((clk_s << SMC_SISLANDS_SPLL_DIV_TABLE_CLKS_SHIFT) & SMC_SISLANDS_SPLL_DIV_TABLE_CLKS_MASK); clk_s 4829 drivers/gpu/drm/radeon/si_dpm.c u32 clk_s = reference_clock * 5 / (reference_divider * ss.rate); clk_s 4830 drivers/gpu/drm/radeon/si_dpm.c u32 clk_v = 4 * ss.percentage * fbdiv / (clk_s * 10000); clk_s 4833 drivers/gpu/drm/radeon/si_dpm.c cg_spll_spread_spectrum |= CLK_S(clk_s);