clk_reg            70 arch/mips/cavium-octeon/csrc-octeon.c 	u64 clk_reg;
clk_reg            74 arch/mips/cavium-octeon/csrc-octeon.c 	clk_reg = octeon_has_feature(OCTEON_FEATURE_FPA3) ?
clk_reg            86 arch/mips/cavium-octeon/csrc-octeon.c 		u64 clk_count = cvmx_read_csr(clk_reg);
clk_reg           160 drivers/char/hw_random/omap-rng.c 	struct clk			*clk_reg;
clk_reg           492 drivers/char/hw_random/omap-rng.c 	priv->clk_reg = devm_clk_get(&pdev->dev, "reg");
clk_reg           493 drivers/char/hw_random/omap-rng.c 	if (IS_ERR(priv->clk_reg) && PTR_ERR(priv->clk_reg) == -EPROBE_DEFER)
clk_reg           495 drivers/char/hw_random/omap-rng.c 	if (!IS_ERR(priv->clk_reg)) {
clk_reg           496 drivers/char/hw_random/omap-rng.c 		ret = clk_prepare_enable(priv->clk_reg);
clk_reg           524 drivers/char/hw_random/omap-rng.c 	clk_disable_unprepare(priv->clk_reg);
clk_reg           542 drivers/char/hw_random/omap-rng.c 	clk_disable_unprepare(priv->clk_reg);
clk_reg            36 drivers/clk/clk-max77686.c 	u32 clk_reg;
clk_reg            58 drivers/clk/clk-max77686.c 		.clk_reg = MAX77686_REG_32KHZ,
clk_reg            63 drivers/clk/clk-max77686.c 		.clk_reg = MAX77686_REG_32KHZ,
clk_reg            68 drivers/clk/clk-max77686.c 		.clk_reg = MAX77686_REG_32KHZ,
clk_reg            77 drivers/clk/clk-max77686.c 		.clk_reg = MAX77802_REG_32KHZ,
clk_reg            82 drivers/clk/clk-max77686.c 		.clk_reg = MAX77802_REG_32KHZ,
clk_reg            91 drivers/clk/clk-max77686.c 		.clk_reg = MAX77620_REG_CNFG1_32K,
clk_reg           106 drivers/clk/clk-max77686.c 	return regmap_update_bits(max77686->regmap, max77686->clk_info->clk_reg,
clk_reg           115 drivers/clk/clk-max77686.c 	regmap_update_bits(max77686->regmap, max77686->clk_info->clk_reg,
clk_reg           126 drivers/clk/clk-max77686.c 	ret = regmap_read(max77686->regmap, max77686->clk_info->clk_reg, &val);
clk_reg            26 drivers/clk/sunxi/clk-simple-gates.c 	void __iomem *clk_reg;
clk_reg            54 drivers/clk/sunxi/clk-simple-gates.c 		clk_reg = reg + 4 * (index / 32);
clk_reg            59 drivers/clk/sunxi/clk-simple-gates.c 							  clk_reg,
clk_reg            29 drivers/clk/sunxi/clk-sun8i-bus-gates.c 	void __iomem *clk_reg;
clk_reg            78 drivers/clk/sunxi/clk-sun8i-bus-gates.c 		clk_reg = reg + 4 * (index / 32);
clk_reg            83 drivers/clk/sunxi/clk-sun8i-bus-gates.c 							  0, clk_reg, clk_bit,
clk_reg           102 drivers/clk/ux500/clk-prcc.c 	struct clk *clk_reg;
clk_reg           127 drivers/clk/ux500/clk-prcc.c 	clk_reg = clk_register(NULL, &clk->hw);
clk_reg           128 drivers/clk/ux500/clk-prcc.c 	if (IS_ERR_OR_NULL(clk_reg))
clk_reg           131 drivers/clk/ux500/clk-prcc.c 	return clk_reg;
clk_reg           253 drivers/clk/ux500/clk-prcmu.c 	struct clk *clk_reg;
clk_reg           279 drivers/clk/ux500/clk-prcmu.c 	clk_reg = clk_register(NULL, &clk->hw);
clk_reg           280 drivers/clk/ux500/clk-prcmu.c 	if (IS_ERR_OR_NULL(clk_reg))
clk_reg           283 drivers/clk/ux500/clk-prcmu.c 	return clk_reg;
clk_reg           131 drivers/clk/ux500/clk-sysctrl.c 	struct clk *clk_reg;
clk_reg           170 drivers/clk/ux500/clk-sysctrl.c 	clk_reg = devm_clk_register(clk->dev, &clk->hw);
clk_reg           171 drivers/clk/ux500/clk-sysctrl.c 	if (IS_ERR(clk_reg))
clk_reg           174 drivers/clk/ux500/clk-sysctrl.c 	return clk_reg;
clk_reg          1451 drivers/gpu/drm/etnaviv/etnaviv_gpu.c 	if (gpu->clk_reg) {
clk_reg          1452 drivers/gpu/drm/etnaviv/etnaviv_gpu.c 		ret = clk_prepare_enable(gpu->clk_reg);
clk_reg          1495 drivers/gpu/drm/etnaviv/etnaviv_gpu.c 	if (gpu->clk_reg)
clk_reg          1496 drivers/gpu/drm/etnaviv/etnaviv_gpu.c 		clk_disable_unprepare(gpu->clk_reg);
clk_reg          1747 drivers/gpu/drm/etnaviv/etnaviv_gpu.c 	gpu->clk_reg = devm_clk_get(&pdev->dev, "reg");
clk_reg          1748 drivers/gpu/drm/etnaviv/etnaviv_gpu.c 	DBG("clk_reg: %p", gpu->clk_reg);
clk_reg          1749 drivers/gpu/drm/etnaviv/etnaviv_gpu.c 	if (IS_ERR(gpu->clk_reg))
clk_reg          1750 drivers/gpu/drm/etnaviv/etnaviv_gpu.c 		gpu->clk_reg = NULL;
clk_reg           141 drivers/gpu/drm/etnaviv/etnaviv_gpu.h 	struct clk *clk_reg;
clk_reg           413 drivers/mmc/host/meson-gx-mmc.c 	u32 clk_reg;
clk_reg           416 drivers/mmc/host/meson-gx-mmc.c 	clk_reg = CLK_ALWAYS_ON(host);
clk_reg           417 drivers/mmc/host/meson-gx-mmc.c 	clk_reg |= CLK_DIV_MASK;
clk_reg           418 drivers/mmc/host/meson-gx-mmc.c 	clk_reg |= FIELD_PREP(CLK_CORE_PHASE_MASK, CLK_PHASE_180);
clk_reg           419 drivers/mmc/host/meson-gx-mmc.c 	clk_reg |= FIELD_PREP(CLK_TX_PHASE_MASK, CLK_PHASE_0);
clk_reg           420 drivers/mmc/host/meson-gx-mmc.c 	clk_reg |= FIELD_PREP(CLK_RX_PHASE_MASK, CLK_PHASE_0);
clk_reg           421 drivers/mmc/host/meson-gx-mmc.c 	writel(clk_reg, host->regs + SD_EMMC_CLOCK);
clk_reg           329 drivers/mmc/host/mmci.c 	if (host->clk_reg != clk) {
clk_reg           330 drivers/mmc/host/mmci.c 		host->clk_reg = clk;
clk_reg          1030 drivers/mmc/host/mmci.c 			clk = host->clk_reg & ~variant->clkreg_enable;
clk_reg          1032 drivers/mmc/host/mmci.c 			clk = host->clk_reg | variant->clkreg_enable;
clk_reg          2125 drivers/mmc/host/mmci.c 		writel(host->clk_reg, host->base + MMCICLOCK);
clk_reg           392 drivers/mmc/host/mmci.h 	u32			clk_reg;
clk_reg            56 drivers/mtd/spi-nor/nxp-spifi.c 	struct clk *clk_reg;
clk_reg           400 drivers/mtd/spi-nor/nxp-spifi.c 	spifi->clk_reg = devm_clk_get(&pdev->dev, "reg");
clk_reg           401 drivers/mtd/spi-nor/nxp-spifi.c 	if (IS_ERR(spifi->clk_reg)) {
clk_reg           403 drivers/mtd/spi-nor/nxp-spifi.c 		return PTR_ERR(spifi->clk_reg);
clk_reg           406 drivers/mtd/spi-nor/nxp-spifi.c 	ret = clk_prepare_enable(spifi->clk_reg);
clk_reg           446 drivers/mtd/spi-nor/nxp-spifi.c 	clk_disable_unprepare(spifi->clk_reg);
clk_reg           456 drivers/mtd/spi-nor/nxp-spifi.c 	clk_disable_unprepare(spifi->clk_reg);
clk_reg            33 drivers/pci/controller/dwc/pcie-armada8k.c 	struct clk *clk_reg;
clk_reg           305 drivers/pci/controller/dwc/pcie-armada8k.c 	pcie->clk_reg = devm_clk_get(dev, "reg");
clk_reg           306 drivers/pci/controller/dwc/pcie-armada8k.c 	if (pcie->clk_reg == ERR_PTR(-EPROBE_DEFER)) {
clk_reg           310 drivers/pci/controller/dwc/pcie-armada8k.c 	if (!IS_ERR(pcie->clk_reg)) {
clk_reg           311 drivers/pci/controller/dwc/pcie-armada8k.c 		ret = clk_prepare_enable(pcie->clk_reg);
clk_reg           340 drivers/pci/controller/dwc/pcie-armada8k.c 	clk_disable_unprepare(pcie->clk_reg);
clk_reg            36 drivers/reset/reset-lpc18xx.c 	struct clk *clk_reg;
clk_reg           155 drivers/reset/reset-lpc18xx.c 	rc->clk_reg = devm_clk_get(&pdev->dev, "reg");
clk_reg           156 drivers/reset/reset-lpc18xx.c 	if (IS_ERR(rc->clk_reg)) {
clk_reg           158 drivers/reset/reset-lpc18xx.c 		return PTR_ERR(rc->clk_reg);
clk_reg           167 drivers/reset/reset-lpc18xx.c 	ret = clk_prepare_enable(rc->clk_reg);
clk_reg           179 drivers/reset/reset-lpc18xx.c 	fcclk = clk_get_rate(rc->clk_reg) / USEC_PER_SEC;
clk_reg           212 drivers/reset/reset-lpc18xx.c 	clk_disable_unprepare(rc->clk_reg);
clk_reg            66 drivers/rtc/rtc-lpc24xx.c 	struct clk *clk_reg;
clk_reg           221 drivers/rtc/rtc-lpc24xx.c 	rtc->clk_reg = devm_clk_get(&pdev->dev, "reg");
clk_reg           222 drivers/rtc/rtc-lpc24xx.c 	if (IS_ERR(rtc->clk_reg)) {
clk_reg           224 drivers/rtc/rtc-lpc24xx.c 		return PTR_ERR(rtc->clk_reg);
clk_reg           233 drivers/rtc/rtc-lpc24xx.c 	ret = clk_prepare_enable(rtc->clk_reg);
clk_reg           265 drivers/rtc/rtc-lpc24xx.c 	clk_disable_unprepare(rtc->clk_reg);
clk_reg           282 drivers/rtc/rtc-lpc24xx.c 	clk_disable_unprepare(rtc->clk_reg);
clk_reg           301 drivers/spi/spi-dw-mid.c 	void __iomem *clk_reg;
clk_reg           304 drivers/spi/spi-dw-mid.c 	clk_reg = ioremap_nocache(MRST_CLK_SPI_REG, 16);
clk_reg           305 drivers/spi/spi-dw-mid.c 	if (!clk_reg)
clk_reg           309 drivers/spi/spi-dw-mid.c 	clk_cdiv = readl(clk_reg + dws->bus_num * sizeof(u32));
clk_reg           314 drivers/spi/spi-dw-mid.c 	iounmap(clk_reg);
clk_reg            31 drivers/tty/serial/8250/8250_lpc18xx.c 	struct clk *clk_reg;
clk_reg           135 drivers/tty/serial/8250/8250_lpc18xx.c 	data->clk_reg = devm_clk_get(&pdev->dev, "reg");
clk_reg           136 drivers/tty/serial/8250/8250_lpc18xx.c 	if (IS_ERR(data->clk_reg)) {
clk_reg           138 drivers/tty/serial/8250/8250_lpc18xx.c 		return PTR_ERR(data->clk_reg);
clk_reg           141 drivers/tty/serial/8250/8250_lpc18xx.c 	ret = clk_prepare_enable(data->clk_reg);
clk_reg           191 drivers/tty/serial/8250/8250_lpc18xx.c 	clk_disable_unprepare(data->clk_reg);
clk_reg           201 drivers/tty/serial/8250/8250_lpc18xx.c 	clk_disable_unprepare(data->clk_reg);
clk_reg          1928 sound/soc/codecs/da7219.c 	u8 clk_reg;
clk_reg          1933 sound/soc/codecs/da7219.c 	clk_reg = snd_soc_component_read32(component, DA7219_DAI_CLK_MODE);
clk_reg          1935 sound/soc/codecs/da7219.c 	return !!(clk_reg & DA7219_DAI_CLK_EN_MASK);