clk_pol 301 drivers/gpu/drm/imx/ipuv3-crtc.c sig_cfg.clk_pol = !!(imx_crtc_state->bus_flags & clk_pol 613 drivers/gpu/ipu-v3/ipu-di.c if (sig->clk_pol) clk_pol 518 drivers/media/dvb-frontends/lgs8gxx.c u8 serial, u8 clk_pol, u8 clk_gated) clk_pol 530 drivers/media/dvb-frontends/lgs8gxx.c t |= clk_pol ? TS_CLK_INVERTED : TS_CLK_NORMAL; clk_pol 986 drivers/media/dvb-frontends/stv0367.c stv0367ter_set_clk_pol(state, state->config->clk_pol); clk_pol 2299 drivers/media/dvb-frontends/stv0367.c switch (state->config->clk_pol) { clk_pol 27 drivers/media/dvb-frontends/stv0367.h int clk_pol; clk_pol 298 drivers/media/i2c/mt9t001.c if (pdata->clk_pol) { clk_pol 332 drivers/media/i2c/mt9v032.c if (mt9v032->pdata && mt9v032->pdata->clk_pol) { clk_pol 1031 drivers/media/i2c/mt9v032.c pdata->clk_pol = !!(endpoint.bus.parallel.flags & clk_pol 839 drivers/media/pci/cx23885/cx23885-dvb.c .clk_pol = 0, clk_pol 846 drivers/media/pci/cx23885/cx23885-dvb.c .clk_pol = 0, clk_pol 938 drivers/media/pci/ddbridge/ddbridge-core.c .clk_pol = STV0367_CLOCKPOLARITY_DEFAULT, clk_pol 945 drivers/media/pci/ddbridge/ddbridge-core.c .clk_pol = STV0367_CLOCKPOLARITY_DEFAULT, clk_pol 368 drivers/media/pci/ngene/ngene-cards.c .clk_pol = STV0367_CLOCKPOLARITY_DEFAULT, clk_pol 375 drivers/media/pci/ngene/ngene-cards.c .clk_pol = STV0367_CLOCKPOLARITY_DEFAULT, clk_pol 445 drivers/media/platform/omap3isp/isp.c ispctrl_val |= parcfg->clk_pol << ISPCTRL_PAR_CLK_POL_SHIFT; clk_pol 2060 drivers/media/platform/omap3isp/isp.c buscfg->bus.parallel.clk_pol = clk_pol 45 drivers/media/platform/omap3isp/omap3isp.h unsigned int clk_pol:1; clk_pol 82 drivers/media/platform/sti/c8sectpfe/c8sectpfe-dvb.c .clk_pol = STV0367_CLOCKPOLARITY_DEFAULT, clk_pol 89 drivers/media/platform/sti/c8sectpfe/c8sectpfe-dvb.c .clk_pol = STV0367_CLOCKPOLARITY_DEFAULT, clk_pol 96 drivers/media/platform/sti/c8sectpfe/c8sectpfe-dvb.c .clk_pol = STV0367_CLOCKPOLARITY_DEFAULT, clk_pol 126 drivers/video/fbdev/mx3fb.c unsigned clk_pol:1; /* true = rising edge */ clk_pol 601 drivers/video/fbdev/mx3fb.c sig.clk_pol << DI_D3_CLK_POL_SHIFT | clk_pol 833 drivers/video/fbdev/mx3fb.c sig_cfg.clk_pol = true; clk_pol 6 include/media/i2c/mt9t001.h unsigned int clk_pol:1; clk_pol 6 include/media/i2c/mt9v032.h unsigned int clk_pol:1; clk_pol 38 include/video/imx-ipu-v3.h unsigned clk_pol:1; /* true = rising edge */