clk_mux_uartl_p   379 drivers/clk/hisilicon/clk-hi3670.c clk_mux_uartl_p[] = { "clkin_sys", "clk_div_uartl", };
clk_mux_uartl_p   445 drivers/clk/hisilicon/clk-hi3670.c 	{ HI3670_CLK_MUX_UARTL, "clk_mux_uartl", clk_mux_uartl_p,
clk_mux_uartl_p   446 drivers/clk/hisilicon/clk-hi3670.c 	  ARRAY_SIZE(clk_mux_uartl_p), CLK_SET_RATE_PARENT,