clk_mux_sysbus_p  230 drivers/clk/hisilicon/clk-hi3660.c clk_mux_sysbus_p[] = {"clk_ppll1", "clk_ppll0"};
clk_mux_sysbus_p  269 drivers/clk/hisilicon/clk-hi3660.c 	{ HI3660_CLK_MUX_SYSBUS, "clk_mux_sysbus", clk_mux_sysbus_p,
clk_mux_sysbus_p  270 drivers/clk/hisilicon/clk-hi3660.c 	  ARRAY_SIZE(clk_mux_sysbus_p), CLK_SET_RATE_PARENT, 0xac, 0, 1,
clk_mux_sysbus_p  356 drivers/clk/hisilicon/clk-hi3670.c clk_mux_sysbus_p[] = { "clk_ppll1", "clk_ppll0", };
clk_mux_sysbus_p  418 drivers/clk/hisilicon/clk-hi3670.c 	{ HI3670_CLK_MUX_SYSBUS, "clk_mux_sysbus", clk_mux_sysbus_p,
clk_mux_sysbus_p  419 drivers/clk/hisilicon/clk-hi3670.c 	  ARRAY_SIZE(clk_mux_sysbus_p), CLK_SET_RATE_PARENT,