clk_mux_sdio_pll_p  371 drivers/clk/hisilicon/clk-hi3670.c clk_mux_sdio_pll_p[] = { "clk_ppll0", "clk_ppll3", "clk_ppll2", "clk_ppll2", };
clk_mux_sdio_pll_p  433 drivers/clk/hisilicon/clk-hi3670.c 	{ HI3670_CLK_MUX_SDIO_PLL, "clk_mux_sdio_pll", clk_mux_sdio_pll_p,
clk_mux_sdio_pll_p  434 drivers/clk/hisilicon/clk-hi3670.c 	  ARRAY_SIZE(clk_mux_sdio_pll_p), CLK_SET_RATE_PARENT,