clk_mux_pll02p    256 drivers/clk/hisilicon/clk-hi3660.c clk_mux_pll02p[] = {"clk_ppll0", "clk_ppll2",};
clk_mux_pll02p    287 drivers/clk/hisilicon/clk-hi3660.c 	{ HI3660_CLK_MUX_MMC_PLL, "clk_mux_mmc_pll", clk_mux_pll02p,
clk_mux_pll02p    288 drivers/clk/hisilicon/clk-hi3660.c 	  ARRAY_SIZE(clk_mux_pll02p), CLK_SET_RATE_PARENT, 0xb4, 0, 1,
clk_mux_pll02p    320 drivers/clk/hisilicon/clk-hi3660.c 	{ HI3660_CLK_MUX_A53HPM, "clk_mux_a53hpm", clk_mux_pll02p,
clk_mux_pll02p    321 drivers/clk/hisilicon/clk-hi3660.c 	  ARRAY_SIZE(clk_mux_pll02p), CLK_SET_RATE_PARENT, 0xd4, 9, 1,
clk_mux_pll02p    323 drivers/clk/hisilicon/clk-hi3660.c 	{ HI3660_CLK_MUX_320M, "clk_mux_320m", clk_mux_pll02p,
clk_mux_pll02p    324 drivers/clk/hisilicon/clk-hi3660.c 	  ARRAY_SIZE(clk_mux_pll02p), CLK_SET_RATE_PARENT, 0x100, 0, 1,