clk_mux_asp_pll_p  630 drivers/clk/hisilicon/clk-hi3670.c clk_mux_asp_pll_p[] = { "clk_ppll0", "clk_fll_src", "clk_gate_ao_asp",
clk_mux_asp_pll_p  646 drivers/clk/hisilicon/clk-hi3670.c 	{ HI3670_CLK_MUX_ASP_PLL, "clk_mux_asp_pll", clk_mux_asp_pll_p,
clk_mux_asp_pll_p  647 drivers/clk/hisilicon/clk-hi3670.c 	  ARRAY_SIZE(clk_mux_asp_pll_p), CLK_SET_RATE_PARENT,