clk_mux_320m_p    375 drivers/clk/hisilicon/clk-hi3670.c clk_mux_320m_p[] = { "clk_ppll2", "clk_ppll0", };
clk_mux_320m_p    439 drivers/clk/hisilicon/clk-hi3670.c 	{ HI3670_CLK_MUX_320M, "clk_mux_320m", clk_mux_320m_p,
clk_mux_320m_p    440 drivers/clk/hisilicon/clk-hi3670.c 	  ARRAY_SIZE(clk_mux_320m_p), CLK_SET_RATE_PARENT,