clk_isp_snclk_mux1_p  405 drivers/clk/hisilicon/clk-hi3670.c clk_isp_snclk_mux1_p[] = { "clkin_sys", "clk_isp_snclk_div1", };
clk_isp_snclk_mux1_p  472 drivers/clk/hisilicon/clk-hi3670.c 	{ HI3670_CLK_ISP_SNCLK_MUX1, "clk_isp_snclk_mux1", clk_isp_snclk_mux1_p,
clk_isp_snclk_mux1_p  473 drivers/clk/hisilicon/clk-hi3670.c 	  ARRAY_SIZE(clk_isp_snclk_mux1_p), CLK_SET_RATE_PARENT,