clk_isp_snclk_mux0_p  403 drivers/clk/hisilicon/clk-hi3670.c clk_isp_snclk_mux0_p[] = { "clkin_sys", "clk_isp_snclk_div0", };
clk_isp_snclk_mux0_p  469 drivers/clk/hisilicon/clk-hi3670.c 	{ HI3670_CLK_ISP_SNCLK_MUX0, "clk_isp_snclk_mux0", clk_isp_snclk_mux0_p,
clk_isp_snclk_mux0_p  470 drivers/clk/hisilicon/clk-hi3670.c 	  ARRAY_SIZE(clk_isp_snclk_mux0_p), CLK_SET_RATE_PARENT,