clk_info           45 drivers/clk/clk-max77686.c 	const struct max77686_hw_clk_info *clk_info;
clk_info          106 drivers/clk/clk-max77686.c 	return regmap_update_bits(max77686->regmap, max77686->clk_info->clk_reg,
clk_info          107 drivers/clk/clk-max77686.c 				  max77686->clk_info->clk_enable_mask,
clk_info          108 drivers/clk/clk-max77686.c 				  max77686->clk_info->clk_enable_mask);
clk_info          115 drivers/clk/clk-max77686.c 	regmap_update_bits(max77686->regmap, max77686->clk_info->clk_reg,
clk_info          116 drivers/clk/clk-max77686.c 			   max77686->clk_info->clk_enable_mask,
clk_info          117 drivers/clk/clk-max77686.c 			   ~max77686->clk_info->clk_enable_mask);
clk_info          126 drivers/clk/clk-max77686.c 	ret = regmap_read(max77686->regmap, max77686->clk_info->clk_reg, &val);
clk_info          131 drivers/clk/clk-max77686.c 	return val & max77686->clk_info->clk_enable_mask;
clk_info          218 drivers/clk/clk-max77686.c 		max_clk_data->clk_info = &hw_clks[i];
clk_info           75 drivers/clk/ingenic/cgu.c 	const struct ingenic_cgu_clk_info *clk_info;
clk_info           82 drivers/clk/ingenic/cgu.c 	clk_info = &cgu->clock_info[ingenic_clk->idx];
clk_info           83 drivers/clk/ingenic/cgu.c 	BUG_ON(clk_info->type != CGU_CLK_PLL);
clk_info           84 drivers/clk/ingenic/cgu.c 	pll_info = &clk_info->pll;
clk_info          113 drivers/clk/ingenic/cgu.c ingenic_pll_calc(const struct ingenic_cgu_clk_info *clk_info,
clk_info          120 drivers/clk/ingenic/cgu.c 	pll_info = &clk_info->pll;
clk_info          128 drivers/clk/ingenic/cgu.c 	n = min_t(unsigned, n, 1 << clk_info->pll.n_bits);
clk_info          132 drivers/clk/ingenic/cgu.c 	m = min_t(unsigned, m, 1 << clk_info->pll.m_bits);
clk_info          149 drivers/clk/ingenic/cgu.c 	const struct ingenic_cgu_clk_info *clk_info;
clk_info          151 drivers/clk/ingenic/cgu.c 	clk_info = &cgu->clock_info[ingenic_clk->idx];
clk_info          152 drivers/clk/ingenic/cgu.c 	BUG_ON(clk_info->type != CGU_CLK_PLL);
clk_info          154 drivers/clk/ingenic/cgu.c 	return clk_info;
clk_info          162 drivers/clk/ingenic/cgu.c 	const struct ingenic_cgu_clk_info *clk_info = to_clk_info(ingenic_clk);
clk_info          164 drivers/clk/ingenic/cgu.c 	return ingenic_pll_calc(clk_info, req_rate, *prate, NULL, NULL, NULL);
clk_info          173 drivers/clk/ingenic/cgu.c 	const struct ingenic_cgu_clk_info *clk_info = to_clk_info(ingenic_clk);
clk_info          174 drivers/clk/ingenic/cgu.c 	const struct ingenic_cgu_pll_info *pll_info = &clk_info->pll;
clk_info          179 drivers/clk/ingenic/cgu.c 	rate = ingenic_pll_calc(clk_info, req_rate, parent_rate,
clk_info          183 drivers/clk/ingenic/cgu.c 			clk_info->name, req_rate, rate);
clk_info          207 drivers/clk/ingenic/cgu.c 	const struct ingenic_cgu_clk_info *clk_info = to_clk_info(ingenic_clk);
clk_info          208 drivers/clk/ingenic/cgu.c 	const struct ingenic_cgu_pll_info *pll_info = &clk_info->pll;
clk_info          242 drivers/clk/ingenic/cgu.c 	const struct ingenic_cgu_clk_info *clk_info = to_clk_info(ingenic_clk);
clk_info          243 drivers/clk/ingenic/cgu.c 	const struct ingenic_cgu_pll_info *pll_info = &clk_info->pll;
clk_info          260 drivers/clk/ingenic/cgu.c 	const struct ingenic_cgu_clk_info *clk_info = to_clk_info(ingenic_clk);
clk_info          261 drivers/clk/ingenic/cgu.c 	const struct ingenic_cgu_pll_info *pll_info = &clk_info->pll;
clk_info          290 drivers/clk/ingenic/cgu.c 	const struct ingenic_cgu_clk_info *clk_info;
clk_info          294 drivers/clk/ingenic/cgu.c 	clk_info = &cgu->clock_info[ingenic_clk->idx];
clk_info          296 drivers/clk/ingenic/cgu.c 	if (clk_info->type & CGU_CLK_MUX) {
clk_info          297 drivers/clk/ingenic/cgu.c 		reg = readl(cgu->base + clk_info->mux.reg);
clk_info          298 drivers/clk/ingenic/cgu.c 		hw_idx = (reg >> clk_info->mux.shift) &
clk_info          299 drivers/clk/ingenic/cgu.c 			 GENMASK(clk_info->mux.bits - 1, 0);
clk_info          306 drivers/clk/ingenic/cgu.c 			if (clk_info->parents[i] != -1)
clk_info          318 drivers/clk/ingenic/cgu.c 	const struct ingenic_cgu_clk_info *clk_info;
clk_info          323 drivers/clk/ingenic/cgu.c 	clk_info = &cgu->clock_info[ingenic_clk->idx];
clk_info          325 drivers/clk/ingenic/cgu.c 	if (clk_info->type & CGU_CLK_MUX) {
clk_info          333 drivers/clk/ingenic/cgu.c 		num_poss = 1 << clk_info->mux.bits;
clk_info          335 drivers/clk/ingenic/cgu.c 			if (clk_info->parents[hw_idx] == -1)
clk_info          345 drivers/clk/ingenic/cgu.c 		mask = GENMASK(clk_info->mux.bits - 1, 0);
clk_info          346 drivers/clk/ingenic/cgu.c 		mask <<= clk_info->mux.shift;
clk_info          351 drivers/clk/ingenic/cgu.c 		reg = readl(cgu->base + clk_info->mux.reg);
clk_info          353 drivers/clk/ingenic/cgu.c 		reg |= hw_idx << clk_info->mux.shift;
clk_info          354 drivers/clk/ingenic/cgu.c 		writel(reg, cgu->base + clk_info->mux.reg);
clk_info          368 drivers/clk/ingenic/cgu.c 	const struct ingenic_cgu_clk_info *clk_info;
clk_info          372 drivers/clk/ingenic/cgu.c 	clk_info = &cgu->clock_info[ingenic_clk->idx];
clk_info          374 drivers/clk/ingenic/cgu.c 	if (clk_info->type & CGU_CLK_DIV) {
clk_info          375 drivers/clk/ingenic/cgu.c 		div_reg = readl(cgu->base + clk_info->div.reg);
clk_info          376 drivers/clk/ingenic/cgu.c 		div = (div_reg >> clk_info->div.shift) &
clk_info          377 drivers/clk/ingenic/cgu.c 		      GENMASK(clk_info->div.bits - 1, 0);
clk_info          379 drivers/clk/ingenic/cgu.c 		if (clk_info->div.div_table)
clk_info          380 drivers/clk/ingenic/cgu.c 			div = clk_info->div.div_table[div];
clk_info          382 drivers/clk/ingenic/cgu.c 			div = (div + 1) * clk_info->div.div;
clk_info          385 drivers/clk/ingenic/cgu.c 	} else if (clk_info->type & CGU_CLK_FIXDIV) {
clk_info          386 drivers/clk/ingenic/cgu.c 		rate /= clk_info->fixdiv.div;
clk_info          393 drivers/clk/ingenic/cgu.c ingenic_clk_calc_hw_div(const struct ingenic_cgu_clk_info *clk_info,
clk_info          398 drivers/clk/ingenic/cgu.c 	for (i = 0; i < (1 << clk_info->div.bits)
clk_info          399 drivers/clk/ingenic/cgu.c 				&& clk_info->div.div_table[i]; i++) {
clk_info          400 drivers/clk/ingenic/cgu.c 		if (clk_info->div.div_table[i] >= div)
clk_info          408 drivers/clk/ingenic/cgu.c ingenic_clk_calc_div(const struct ingenic_cgu_clk_info *clk_info,
clk_info          416 drivers/clk/ingenic/cgu.c 	if (clk_info->div.div_table) {
clk_info          417 drivers/clk/ingenic/cgu.c 		hw_div = ingenic_clk_calc_hw_div(clk_info, div);
clk_info          419 drivers/clk/ingenic/cgu.c 		return clk_info->div.div_table[hw_div];
clk_info          423 drivers/clk/ingenic/cgu.c 	div = min_t(unsigned, div, 1 << clk_info->div.bits);
clk_info          431 drivers/clk/ingenic/cgu.c 	div /= clk_info->div.div;
clk_info          432 drivers/clk/ingenic/cgu.c 	div *= clk_info->div.div;
clk_info          443 drivers/clk/ingenic/cgu.c 	const struct ingenic_cgu_clk_info *clk_info;
clk_info          446 drivers/clk/ingenic/cgu.c 	clk_info = &cgu->clock_info[ingenic_clk->idx];
clk_info          448 drivers/clk/ingenic/cgu.c 	if (clk_info->type & CGU_CLK_DIV)
clk_info          449 drivers/clk/ingenic/cgu.c 		div = ingenic_clk_calc_div(clk_info, *parent_rate, req_rate);
clk_info          450 drivers/clk/ingenic/cgu.c 	else if (clk_info->type & CGU_CLK_FIXDIV)
clk_info          451 drivers/clk/ingenic/cgu.c 		div = clk_info->fixdiv.div;
clk_info          462 drivers/clk/ingenic/cgu.c 	const struct ingenic_cgu_clk_info *clk_info;
clk_info          469 drivers/clk/ingenic/cgu.c 	clk_info = &cgu->clock_info[ingenic_clk->idx];
clk_info          471 drivers/clk/ingenic/cgu.c 	if (clk_info->type & CGU_CLK_DIV) {
clk_info          472 drivers/clk/ingenic/cgu.c 		div = ingenic_clk_calc_div(clk_info, parent_rate, req_rate);
clk_info          478 drivers/clk/ingenic/cgu.c 		if (clk_info->div.div_table)
clk_info          479 drivers/clk/ingenic/cgu.c 			hw_div = ingenic_clk_calc_hw_div(clk_info, div);
clk_info          481 drivers/clk/ingenic/cgu.c 			hw_div = ((div / clk_info->div.div) - 1);
clk_info          484 drivers/clk/ingenic/cgu.c 		reg = readl(cgu->base + clk_info->div.reg);
clk_info          487 drivers/clk/ingenic/cgu.c 		mask = GENMASK(clk_info->div.bits - 1, 0);
clk_info          488 drivers/clk/ingenic/cgu.c 		reg &= ~(mask << clk_info->div.shift);
clk_info          489 drivers/clk/ingenic/cgu.c 		reg |= hw_div << clk_info->div.shift;
clk_info          492 drivers/clk/ingenic/cgu.c 		if (clk_info->div.stop_bit != -1)
clk_info          493 drivers/clk/ingenic/cgu.c 			reg &= ~BIT(clk_info->div.stop_bit);
clk_info          496 drivers/clk/ingenic/cgu.c 		if (clk_info->div.ce_bit != -1)
clk_info          497 drivers/clk/ingenic/cgu.c 			reg |= BIT(clk_info->div.ce_bit);
clk_info          500 drivers/clk/ingenic/cgu.c 		writel(reg, cgu->base + clk_info->div.reg);
clk_info          503 drivers/clk/ingenic/cgu.c 		if (clk_info->div.busy_bit != -1) {
clk_info          505 drivers/clk/ingenic/cgu.c 				reg = readl(cgu->base + clk_info->div.reg);
clk_info          506 drivers/clk/ingenic/cgu.c 				if (!(reg & BIT(clk_info->div.busy_bit)))
clk_info          525 drivers/clk/ingenic/cgu.c 	const struct ingenic_cgu_clk_info *clk_info;
clk_info          528 drivers/clk/ingenic/cgu.c 	clk_info = &cgu->clock_info[ingenic_clk->idx];
clk_info          530 drivers/clk/ingenic/cgu.c 	if (clk_info->type & CGU_CLK_GATE) {
clk_info          533 drivers/clk/ingenic/cgu.c 		ingenic_cgu_gate_set(cgu, &clk_info->gate, false);
clk_info          536 drivers/clk/ingenic/cgu.c 		if (clk_info->gate.delay_us)
clk_info          537 drivers/clk/ingenic/cgu.c 			udelay(clk_info->gate.delay_us);
clk_info          547 drivers/clk/ingenic/cgu.c 	const struct ingenic_cgu_clk_info *clk_info;
clk_info          550 drivers/clk/ingenic/cgu.c 	clk_info = &cgu->clock_info[ingenic_clk->idx];
clk_info          552 drivers/clk/ingenic/cgu.c 	if (clk_info->type & CGU_CLK_GATE) {
clk_info          555 drivers/clk/ingenic/cgu.c 		ingenic_cgu_gate_set(cgu, &clk_info->gate, true);
clk_info          564 drivers/clk/ingenic/cgu.c 	const struct ingenic_cgu_clk_info *clk_info;
clk_info          568 drivers/clk/ingenic/cgu.c 	clk_info = &cgu->clock_info[ingenic_clk->idx];
clk_info          570 drivers/clk/ingenic/cgu.c 	if (clk_info->type & CGU_CLK_GATE) {
clk_info          572 drivers/clk/ingenic/cgu.c 		enabled = !ingenic_cgu_gate_get(cgu, &clk_info->gate);
clk_info          598 drivers/clk/ingenic/cgu.c 	const struct ingenic_cgu_clk_info *clk_info = &cgu->clock_info[idx];
clk_info          606 drivers/clk/ingenic/cgu.c 	BUILD_BUG_ON(ARRAY_SIZE(clk_info->parents) > ARRAY_SIZE(parent_names));
clk_info          608 drivers/clk/ingenic/cgu.c 	if (clk_info->type == CGU_CLK_EXT) {
clk_info          609 drivers/clk/ingenic/cgu.c 		clk = of_clk_get_by_name(cgu->np, clk_info->name);
clk_info          612 drivers/clk/ingenic/cgu.c 			       __func__, clk_info->name);
clk_info          616 drivers/clk/ingenic/cgu.c 		err = clk_register_clkdev(clk, clk_info->name, NULL);
clk_info          625 drivers/clk/ingenic/cgu.c 	if (!clk_info->type) {
clk_info          627 drivers/clk/ingenic/cgu.c 		       clk_info->name);
clk_info          641 drivers/clk/ingenic/cgu.c 	clk_init.name = clk_info->name;
clk_info          645 drivers/clk/ingenic/cgu.c 	caps = clk_info->type;
clk_info          651 drivers/clk/ingenic/cgu.c 			num_possible = 1 << clk_info->mux.bits;
clk_info          653 drivers/clk/ingenic/cgu.c 			num_possible = ARRAY_SIZE(clk_info->parents);
clk_info          656 drivers/clk/ingenic/cgu.c 			if (clk_info->parents[i] == -1)
clk_info          659 drivers/clk/ingenic/cgu.c 			parent = cgu->clocks.clks[clk_info->parents[i]];
clk_info          668 drivers/clk/ingenic/cgu.c 		BUG_ON(clk_info->parents[0] == -1);
clk_info          670 drivers/clk/ingenic/cgu.c 		parent = cgu->clocks.clks[clk_info->parents[0]];
clk_info          675 drivers/clk/ingenic/cgu.c 		clk_init.ops = clk_info->custom.clk_ops;
clk_info          724 drivers/clk/ingenic/cgu.c 		       clk_info->name);
clk_info          729 drivers/clk/ingenic/cgu.c 	err = clk_register_clkdev(clk, clk_info->name, NULL);
clk_info         1437 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c 			      struct smu_clock_info *clk_info,
clk_info         1443 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c 	if (!clk_info)
clk_info         1450 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c 	clk_info->min_mem_clk = level.memory_clock;
clk_info         1451 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c 	clk_info->min_eng_clk = level.core_clock;
clk_info         1452 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c 	clk_info->min_bus_bandwidth = level.non_local_mem_freq * level.non_local_mem_width;
clk_info         1458 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c 	clk_info->min_mem_clk = level.memory_clock;
clk_info         1459 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c 	clk_info->min_eng_clk = level.core_clock;
clk_info         1460 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c 	clk_info->min_bus_bandwidth = level.non_local_mem_freq * level.non_local_mem_width;
clk_info          404 drivers/gpu/drm/ast/ast_mode.c 	const struct ast_vbios_dclk_info *clk_info;
clk_info          407 drivers/gpu/drm/ast/ast_mode.c 		clk_info = &dclk_table_ast2500[vbios_mode->enh_table->dclk_index];
clk_info          409 drivers/gpu/drm/ast/ast_mode.c 		clk_info = &dclk_table[vbios_mode->enh_table->dclk_index];
clk_info          411 drivers/gpu/drm/ast/ast_mode.c 	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xc0, 0x00, clk_info->param1);
clk_info          412 drivers/gpu/drm/ast/ast_mode.c 	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xc1, 0x00, clk_info->param2);
clk_info          414 drivers/gpu/drm/ast/ast_mode.c 			       (clk_info->param3 & 0xc0) |
clk_info          415 drivers/gpu/drm/ast/ast_mode.c 			       ((clk_info->param3 & 0x3) << 4));
clk_info           23 drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_pm.c 	struct mtk_vcodec_clk_info *clk_info;
clk_info           48 drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_pm.c 		dec_clk->clk_info = devm_kcalloc(&pdev->dev,
clk_info           49 drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_pm.c 			dec_clk->clk_num, sizeof(*clk_info),
clk_info           51 drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_pm.c 		if (!dec_clk->clk_info)
clk_info           59 drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_pm.c 		clk_info = &dec_clk->clk_info[i];
clk_info           61 drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_pm.c 			"clock-names", i, &clk_info->clk_name);
clk_info           66 drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_pm.c 		clk_info->vcodec_clk = devm_clk_get(&pdev->dev,
clk_info           67 drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_pm.c 			clk_info->clk_name);
clk_info           68 drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_pm.c 		if (IS_ERR(clk_info->vcodec_clk)) {
clk_info           70 drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_pm.c 				clk_info->clk_name);
clk_info           71 drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_pm.c 			return PTR_ERR(clk_info->vcodec_clk);
clk_info          109 drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_pm.c 		ret = clk_prepare_enable(dec_clk->clk_info[i].vcodec_clk);
clk_info          112 drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_pm.c 				dec_clk->clk_info[i].clk_name, ret);
clk_info          126 drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_pm.c 		clk_disable_unprepare(dec_clk->clk_info[i].vcodec_clk);
clk_info          136 drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_pm.c 		clk_disable_unprepare(dec_clk->clk_info[i].vcodec_clk);
clk_info          183 drivers/media/platform/mtk-vcodec/mtk_vcodec_drv.h 	struct mtk_vcodec_clk_info	*clk_info;
clk_info           24 drivers/media/platform/mtk-vcodec/mtk_vcodec_enc_pm.c 	struct mtk_vcodec_clk_info *clk_info;
clk_info           69 drivers/media/platform/mtk-vcodec/mtk_vcodec_enc_pm.c 		enc_clk->clk_info = devm_kcalloc(&pdev->dev,
clk_info           70 drivers/media/platform/mtk-vcodec/mtk_vcodec_enc_pm.c 			enc_clk->clk_num, sizeof(*clk_info),
clk_info           72 drivers/media/platform/mtk-vcodec/mtk_vcodec_enc_pm.c 		if (!enc_clk->clk_info)
clk_info           80 drivers/media/platform/mtk-vcodec/mtk_vcodec_enc_pm.c 		clk_info = &enc_clk->clk_info[i];
clk_info           82 drivers/media/platform/mtk-vcodec/mtk_vcodec_enc_pm.c 			"clock-names", i, &clk_info->clk_name);
clk_info           87 drivers/media/platform/mtk-vcodec/mtk_vcodec_enc_pm.c 		clk_info->vcodec_clk = devm_clk_get(&pdev->dev,
clk_info           88 drivers/media/platform/mtk-vcodec/mtk_vcodec_enc_pm.c 			clk_info->clk_name);
clk_info           89 drivers/media/platform/mtk-vcodec/mtk_vcodec_enc_pm.c 		if (IS_ERR(clk_info->vcodec_clk)) {
clk_info           91 drivers/media/platform/mtk-vcodec/mtk_vcodec_enc_pm.c 				clk_info->clk_name);
clk_info           92 drivers/media/platform/mtk-vcodec/mtk_vcodec_enc_pm.c 			return PTR_ERR(clk_info->vcodec_clk);
clk_info          110 drivers/media/platform/mtk-vcodec/mtk_vcodec_enc_pm.c 		ret = clk_prepare_enable(enc_clk->clk_info[i].vcodec_clk);
clk_info          113 drivers/media/platform/mtk-vcodec/mtk_vcodec_enc_pm.c 				enc_clk->clk_info[i].clk_name, ret);
clk_info          135 drivers/media/platform/mtk-vcodec/mtk_vcodec_enc_pm.c 		clk_disable_unprepare(enc_clk->clk_info[i].vcodec_clk);
clk_info          146 drivers/media/platform/mtk-vcodec/mtk_vcodec_enc_pm.c 		clk_disable_unprepare(enc_clk->clk_info[i].vcodec_clk);
clk_info         1388 drivers/net/wireless/ath/ath10k/snoc.c 			       struct ath10k_clk_info *clk_info)
clk_info         1393 drivers/net/wireless/ath/ath10k/snoc.c 	handle = devm_clk_get(dev, clk_info->name);
clk_info         1396 drivers/net/wireless/ath/ath10k/snoc.c 		if (clk_info->required) {
clk_info         1398 drivers/net/wireless/ath/ath10k/snoc.c 				   clk_info->name, ret);
clk_info         1402 drivers/net/wireless/ath/ath10k/snoc.c 			   clk_info->name,
clk_info         1408 drivers/net/wireless/ath/ath10k/snoc.c 		   clk_info->name, clk_info->freq);
clk_info         1410 drivers/net/wireless/ath/ath10k/snoc.c 	clk_info->handle = handle;
clk_info         1540 drivers/net/wireless/ath/ath10k/snoc.c 	struct ath10k_clk_info *clk_info;
clk_info         1545 drivers/net/wireless/ath/ath10k/snoc.c 		clk_info = &ar_snoc->clk[i];
clk_info         1547 drivers/net/wireless/ath/ath10k/snoc.c 		if (!clk_info->handle)
clk_info         1551 drivers/net/wireless/ath/ath10k/snoc.c 			   clk_info->name);
clk_info         1553 drivers/net/wireless/ath/ath10k/snoc.c 		if (clk_info->freq) {
clk_info         1554 drivers/net/wireless/ath/ath10k/snoc.c 			ret = clk_set_rate(clk_info->handle, clk_info->freq);
clk_info         1558 drivers/net/wireless/ath/ath10k/snoc.c 					   clk_info->name, clk_info->freq);
clk_info         1563 drivers/net/wireless/ath/ath10k/snoc.c 		ret = clk_prepare_enable(clk_info->handle);
clk_info         1566 drivers/net/wireless/ath/ath10k/snoc.c 				   clk_info->name);
clk_info         1575 drivers/net/wireless/ath/ath10k/snoc.c 		clk_info = &ar_snoc->clk[i];
clk_info         1577 drivers/net/wireless/ath/ath10k/snoc.c 		if (!clk_info->handle)
clk_info         1580 drivers/net/wireless/ath/ath10k/snoc.c 		clk_disable_unprepare(clk_info->handle);
clk_info         1589 drivers/net/wireless/ath/ath10k/snoc.c 	struct ath10k_clk_info *clk_info;
clk_info         1593 drivers/net/wireless/ath/ath10k/snoc.c 		clk_info = &ar_snoc->clk[i];
clk_info         1595 drivers/net/wireless/ath/ath10k/snoc.c 		if (!clk_info->handle)
clk_info         1599 drivers/net/wireless/ath/ath10k/snoc.c 			   clk_info->name);
clk_info         1601 drivers/net/wireless/ath/ath10k/snoc.c 		clk_disable_unprepare(clk_info->handle);