clk_base           22 arch/arm/mach-prima2/platsmp.c static void __iomem *clk_base;
clk_base           59 arch/arm/mach-prima2/platsmp.c 	clk_base = of_iomap(np, 0);
clk_base           60 arch/arm/mach-prima2/platsmp.c 	if (!clk_base)
clk_base           71 arch/arm/mach-prima2/platsmp.c 		clk_base + SIRFSOC_CPU1_JUMPADDR_OFFSET);
clk_base           75 arch/arm/mach-prima2/platsmp.c 		clk_base + SIRFSOC_CPU1_WAKEMAGIC_OFFSET);
clk_base          544 drivers/clk/clk-npcm7xx.c 	void __iomem *clk_base;
clk_base          557 drivers/clk/clk-npcm7xx.c 	clk_base = ioremap(res.start, resource_size(&res));
clk_base          558 drivers/clk/clk-npcm7xx.c 	if (!clk_base)
clk_base          575 drivers/clk/clk-npcm7xx.c 		hw = npcm7xx_clk_register_pll(clk_base + pll_data->reg,
clk_base          608 drivers/clk/clk-npcm7xx.c 			mux_data->flags, clk_base + NPCM7XX_CLKSEL,
clk_base          628 drivers/clk/clk-npcm7xx.c 				clk_base + div_data->reg,
clk_base          652 drivers/clk/clk-npcm7xx.c 	iounmap(clk_base);
clk_base         3647 drivers/clk/meson/meson8b.c 	void __iomem *clk_base;
clk_base         3656 drivers/clk/meson/meson8b.c 		clk_base = of_iomap(np, 1);
clk_base         3657 drivers/clk/meson/meson8b.c 		if (!clk_base) {
clk_base         3662 drivers/clk/meson/meson8b.c 		map = regmap_init_mmio(NULL, clk_base, &clkc_regmap_config);
clk_base          638 drivers/clk/nxp/clk-lpc18xx-cgu.c static struct clk *clk_base[BASE_CLK_MAX];
clk_base          640 drivers/clk/nxp/clk-lpc18xx-cgu.c 	.clks = clk_base,
clk_base          649 drivers/clk/nxp/clk-lpc18xx-cgu.c 		clk_base[i] = lpc18xx_register_base_clk(&lpc18xx_cgu_base_clks[i],
clk_base          651 drivers/clk/nxp/clk-lpc18xx-cgu.c 		if (IS_ERR(clk_base[i]) && PTR_ERR(clk_base[i]) != -ENOENT)
clk_base           20 drivers/clk/tegra/clk-periph-gate.c 	readl_relaxed(gate->clk_base + (gate->regs->enb_reg))
clk_base           22 drivers/clk/tegra/clk-periph-gate.c 	writel_relaxed(val, gate->clk_base + (gate->regs->enb_set_reg))
clk_base           24 drivers/clk/tegra/clk-periph-gate.c 	writel_relaxed(val, gate->clk_base + (gate->regs->enb_clr_reg))
clk_base           27 drivers/clk/tegra/clk-periph-gate.c 	readl_relaxed(gate->clk_base + (gate->regs->rst_reg))
clk_base           29 drivers/clk/tegra/clk-periph-gate.c 	writel_relaxed(val, gate->clk_base + (gate->regs->rst_clr_reg))
clk_base           76 drivers/clk/tegra/clk-periph-gate.c 		writel_relaxed(0, gate->clk_base + LVL2_CLK_GATE_OVRE);
clk_base           77 drivers/clk/tegra/clk-periph-gate.c 		writel_relaxed(BIT(22), gate->clk_base + LVL2_CLK_GATE_OVRE);
clk_base           79 drivers/clk/tegra/clk-periph-gate.c 		writel_relaxed(0, gate->clk_base + LVL2_CLK_GATE_OVRE);
clk_base          120 drivers/clk/tegra/clk-periph-gate.c 		const char *parent_name, u8 gate_flags, void __iomem *clk_base,
clk_base          145 drivers/clk/tegra/clk-periph-gate.c 	gate->clk_base = clk_base;
clk_base          132 drivers/clk/tegra/clk-periph.c 			void __iomem *clk_base, u32 offset,
clk_base          160 drivers/clk/tegra/clk-periph.c 	periph->mux.reg = clk_base + offset;
clk_base          161 drivers/clk/tegra/clk-periph.c 	periph->divider.reg = div ? (clk_base + offset) : NULL;
clk_base          162 drivers/clk/tegra/clk-periph.c 	periph->gate.clk_base = clk_base;
clk_base          179 drivers/clk/tegra/clk-periph.c 		struct tegra_clk_periph *periph, void __iomem *clk_base,
clk_base          183 drivers/clk/tegra/clk-periph.c 			periph, clk_base, offset, flags);
clk_base          188 drivers/clk/tegra/clk-periph.c 		struct tegra_clk_periph *periph, void __iomem *clk_base,
clk_base          193 drivers/clk/tegra/clk-periph.c 			periph, clk_base, offset, CLK_SET_RATE_PARENT);
clk_base          196 drivers/clk/tegra/clk-periph.c struct clk *tegra_clk_register_periph_data(void __iomem *clk_base,
clk_base          201 drivers/clk/tegra/clk-periph.c 					  clk_base, init->offset, init->flags);
clk_base          230 drivers/clk/tegra/clk-pll.c #define pll_readl(offset, p) readl_relaxed(p->clk_base + offset)
clk_base          237 drivers/clk/tegra/clk-pll.c #define pll_writel(val, offset, p) writel_relaxed(val, p->clk_base + offset)
clk_base          302 drivers/clk/tegra/clk-pll.c 	lock_addr = pll->clk_base;
clk_base          979 drivers/clk/tegra/clk-pll.c 	val = readl(pll->clk_base + PLLE_SS_CTRL);
clk_base          982 drivers/clk/tegra/clk-pll.c 	writel(val, pll->clk_base + PLLE_SS_CTRL);
clk_base         1116 drivers/clk/tegra/clk-pll.c 	value = readl_relaxed(pll->clk_base + UTMIP_PLL_CFG2);
clk_base         1126 drivers/clk/tegra/clk-pll.c 	writel_relaxed(value, pll->clk_base + UTMIP_PLL_CFG2);
clk_base         1128 drivers/clk/tegra/clk-pll.c 	value = readl_relaxed(pll->clk_base + UTMIP_PLL_CFG1);
clk_base         1138 drivers/clk/tegra/clk-pll.c 	writel_relaxed(value, pll->clk_base + UTMIP_PLL_CFG1);
clk_base         1222 drivers/clk/tegra/clk-pll.c 			       void __iomem *clk_base,
clk_base         1252 drivers/clk/tegra/clk-pll.c 	writel_relaxed(val, clk_base + pll_params->dyn_ramp_reg);
clk_base         1744 drivers/clk/tegra/clk-pll.c 	value = readl_relaxed(pll->clk_base + UTMIP_PLL_CFG2);
clk_base         1754 drivers/clk/tegra/clk-pll.c 	writel_relaxed(value, pll->clk_base + UTMIP_PLL_CFG2);
clk_base         1756 drivers/clk/tegra/clk-pll.c 	value = readl_relaxed(pll->clk_base + UTMIP_PLL_CFG1);
clk_base         1767 drivers/clk/tegra/clk-pll.c 	writel_relaxed(value, pll->clk_base + UTMIP_PLL_CFG1);
clk_base         1770 drivers/clk/tegra/clk-pll.c 	value = readl_relaxed(pll->clk_base + UTMIPLL_HW_PWRDN_CFG0);
clk_base         1774 drivers/clk/tegra/clk-pll.c 	writel_relaxed(value, pll->clk_base + UTMIPLL_HW_PWRDN_CFG0);
clk_base         1776 drivers/clk/tegra/clk-pll.c 	value = readl_relaxed(pll->clk_base + UTMIP_PLL_CFG1);
clk_base         1779 drivers/clk/tegra/clk-pll.c 	writel_relaxed(value, pll->clk_base + UTMIP_PLL_CFG1);
clk_base         1787 drivers/clk/tegra/clk-pll.c 	value = readl_relaxed(pll->clk_base + UTMIPLL_HW_PWRDN_CFG0);
clk_base         1790 drivers/clk/tegra/clk-pll.c 	writel_relaxed(value, pll->clk_base + UTMIPLL_HW_PWRDN_CFG0);
clk_base         1795 drivers/clk/tegra/clk-pll.c 	value = readl_relaxed(pll->clk_base + UTMIPLL_HW_PWRDN_CFG0);
clk_base         1797 drivers/clk/tegra/clk-pll.c 	writel_relaxed(value, pll->clk_base + UTMIPLL_HW_PWRDN_CFG0);
clk_base         1807 drivers/clk/tegra/clk-pll.c static struct tegra_clk_pll *_tegra_init_pll(void __iomem *clk_base,
clk_base         1817 drivers/clk/tegra/clk-pll.c 	pll->clk_base = clk_base;
clk_base         1859 drivers/clk/tegra/clk-pll.c 		void __iomem *clk_base, void __iomem *pmc,
clk_base         1868 drivers/clk/tegra/clk-pll.c 	pll = _tegra_init_pll(clk_base, pmc, pll_params, lock);
clk_base         1890 drivers/clk/tegra/clk-pll.c 		void __iomem *clk_base, void __iomem *pmc,
clk_base         1902 drivers/clk/tegra/clk-pll.c 	pll = _tegra_init_pll(clk_base, pmc, pll_params, lock);
clk_base         1915 drivers/clk/tegra/clk-pll.c 		void __iomem *clk_base, unsigned long flags,
clk_base         1923 drivers/clk/tegra/clk-pll.c 	pll = _tegra_init_pll(clk_base, NULL, pll_params, lock);
clk_base         1981 drivers/clk/tegra/clk-pll.c 			  void __iomem *clk_base, void __iomem *pmc,
clk_base         2016 drivers/clk/tegra/clk-pll.c 		err = _setup_dynamic_ramp(pll_params, clk_base, parent_rate);
clk_base         2020 drivers/clk/tegra/clk-pll.c 		val = readl_relaxed(clk_base + pll_params->base_reg);
clk_base         2021 drivers/clk/tegra/clk-pll.c 		val_iddq = readl_relaxed(clk_base + pll_params->iddq_reg);
clk_base         2028 drivers/clk/tegra/clk-pll.c 				       clk_base + pll_params->iddq_reg);
clk_base         2032 drivers/clk/tegra/clk-pll.c 	pll = _tegra_init_pll(clk_base, pmc, pll_params, lock);
clk_base         2045 drivers/clk/tegra/clk-pll.c 			  void __iomem *clk_base, void __iomem *pmc,
clk_base         2060 drivers/clk/tegra/clk-pll.c 	pll = _tegra_init_pll(clk_base, pmc, pll_params, lock);
clk_base         2068 drivers/clk/tegra/clk-pll.c 		WARN_ON(readl_relaxed(clk_base + pll_params->iddq_reg) &
clk_base         2094 drivers/clk/tegra/clk-pll.c 			  void __iomem *clk_base, void __iomem *pmc,
clk_base         2123 drivers/clk/tegra/clk-pll.c 	pll = _tegra_init_pll(clk_base, pmc, pll_params, lock);
clk_base         2136 drivers/clk/tegra/clk-pll.c 			  void __iomem *clk_base, void __iomem *pmc,
clk_base         2162 drivers/clk/tegra/clk-pll.c 	pll = _tegra_init_pll(clk_base, pmc, pll_params, lock);
clk_base         2211 drivers/clk/tegra/clk-pll.c 				void __iomem *clk_base, unsigned long flags,
clk_base         2219 drivers/clk/tegra/clk-pll.c 	pll = _tegra_init_pll(clk_base, NULL, pll_params, lock);
clk_base         2249 drivers/clk/tegra/clk-pll.c 				 void __iomem *clk_base, unsigned long flags,
clk_base         2258 drivers/clk/tegra/clk-pll.c 	pll = _tegra_init_pll(clk_base, NULL, pll_params, lock);
clk_base         2282 drivers/clk/tegra/clk-pll.c 				void __iomem *clk_base, unsigned long flags,
clk_base         2303 drivers/clk/tegra/clk-pll.c 	pll = _tegra_init_pll(clk_base, NULL, pll_params, lock);
clk_base         2337 drivers/clk/tegra/clk-pll.c 	val_iddq = readl_relaxed(clk_base + pll_params->iddq_reg);
clk_base         2346 drivers/clk/tegra/clk-pll.c 		writel_relaxed(val_iddq, clk_base + pll_params->iddq_reg);
clk_base         2364 drivers/clk/tegra/clk-pll.c 			  const char *parent_name, void __iomem *clk_base,
clk_base         2378 drivers/clk/tegra/clk-pll.c 	pll = _tegra_init_pll(clk_base, pmc, pll_params, lock);
clk_base         2532 drivers/clk/tegra/clk-pll.c 				void __iomem *clk_base, unsigned long flags,
clk_base         2540 drivers/clk/tegra/clk-pll.c 	pll = _tegra_init_pll(clk_base, NULL, pll_params, lock);
clk_base         2569 drivers/clk/tegra/clk-pll.c 			const char *parent_name, void __iomem *clk_base,
clk_base         2598 drivers/clk/tegra/clk-pll.c 	pll = _tegra_init_pll(clk_base, pmc, pll_params, lock);
clk_base         2611 drivers/clk/tegra/clk-pll.c 				const char *parent_name, void __iomem *clk_base,
clk_base         2631 drivers/clk/tegra/clk-pll.c 	val = readl_relaxed(clk_base + pll_params->base_reg);
clk_base         2646 drivers/clk/tegra/clk-pll.c 	pll = _tegra_init_pll(clk_base, NULL, pll_params, lock);
clk_base         2660 drivers/clk/tegra/clk-pll.c 			  void __iomem *clk_base, void __iomem *pmc,
clk_base         2689 drivers/clk/tegra/clk-pll.c 	pll = _tegra_init_pll(clk_base, pmc, pll_params, lock);
clk_base          209 drivers/clk/tegra/clk-sdmmc-mux.c 	void __iomem *clk_base, u32 offset, u32 clk_num, u8 div_flags,
clk_base          233 drivers/clk/tegra/clk-sdmmc-mux.c 	sdmmc_mux->reg = clk_base + offset;
clk_base          235 drivers/clk/tegra/clk-sdmmc-mux.c 	sdmmc_mux->gate.clk_base = clk_base;
clk_base          128 drivers/clk/tegra/clk-tegra-audio.c static void __init tegra_audio_sync_clk_init(void __iomem *clk_base,
clk_base          148 drivers/clk/tegra/clk-tegra-audio.c 					clk_base + data->offset, 0, 3, 0,
clk_base          157 drivers/clk/tegra/clk-tegra-audio.c 					0, clk_base + data->offset, 4,
clk_base          163 drivers/clk/tegra/clk-tegra-audio.c void __init tegra_audio_clk_init(void __iomem *clk_base,
clk_base          184 drivers/clk/tegra/clk-tegra-audio.c 					clk_base, pmc_base, 0, info->pll_params,
clk_base          194 drivers/clk/tegra/clk-tegra-audio.c 				clk_base + PLLA_OUT, 0, TEGRA_DIVIDER_ROUND_UP,
clk_base          197 drivers/clk/tegra/clk-tegra-audio.c 				clk_base + PLLA_OUT, 1, 0, CLK_IGNORE_UNUSED |
clk_base          215 drivers/clk/tegra/clk-tegra-audio.c 	tegra_audio_sync_clk_init(clk_base, tegra_clks, audio_clks,
clk_base          221 drivers/clk/tegra/clk-tegra-audio.c 		writel_relaxed(1, clk_base + dmic_clks[i].offset);
clk_base          223 drivers/clk/tegra/clk-tegra-audio.c 	tegra_audio_sync_clk_init(clk_base, tegra_clks, dmic_clks,
clk_base          238 drivers/clk/tegra/clk-tegra-audio.c 				data->name_2x, clk_base + AUDIO_SYNC_DOUBLER,
clk_base          243 drivers/clk/tegra/clk-tegra-audio.c 				clk_base, CLK_SET_RATE_PARENT, data->clk_num,
clk_base           21 drivers/clk/tegra/clk-tegra-fixed.c int __init tegra_osc_clk_init(void __iomem *clk_base, struct tegra_clk *clks,
clk_base           31 drivers/clk/tegra/clk-tegra-fixed.c 	val = readl_relaxed(clk_base + OSC_CTRL);
clk_base          872 drivers/clk/tegra/clk-tegra-periph.c static void __init periph_clk_init(void __iomem *clk_base,
clk_base          894 drivers/clk/tegra/clk-tegra-periph.c 		clk = tegra_clk_register_periph_data(clk_base, data);
clk_base          899 drivers/clk/tegra/clk-tegra-periph.c static void __init gate_clk_init(void __iomem *clk_base,
clk_base          917 drivers/clk/tegra/clk-tegra-periph.c 				clk_base, data->flags,
clk_base          924 drivers/clk/tegra/clk-tegra-periph.c static void __init div_clk_init(void __iomem *clk_base,
clk_base          941 drivers/clk/tegra/clk-tegra-periph.c 				data->p.parent_name, clk_base + data->offset,
clk_base          951 drivers/clk/tegra/clk-tegra-periph.c static void __init init_pllp(void __iomem *clk_base, void __iomem *pmc_base,
clk_base          962 drivers/clk/tegra/clk-tegra-periph.c 		clk = tegra_clk_register_pll("pll_p", "pll_ref", clk_base,
clk_base          978 drivers/clk/tegra/clk-tegra-periph.c 				clk_base + data->offset, 0, data->div_flags,
clk_base          981 drivers/clk/tegra/clk-tegra-periph.c 				data->div_name, clk_base + data->offset,
clk_base          999 drivers/clk/tegra/clk-tegra-periph.c 				"pll_p_out_cpu", clk_base + PLLP_OUTB, 0, 0, 24,
clk_base         1005 drivers/clk/tegra/clk-tegra-periph.c 					"pll_p_out4_div", clk_base + PLLP_OUTB,
clk_base         1018 drivers/clk/tegra/clk-tegra-periph.c 				clk_base + PLLP_MISC1, 29, 0, NULL);
clk_base         1027 drivers/clk/tegra/clk-tegra-periph.c 				CLK_IGNORE_UNUSED, clk_base + PLLP_MISC1, 28, 0,
clk_base         1034 drivers/clk/tegra/clk-tegra-periph.c void __init tegra_periph_clk_init(void __iomem *clk_base,
clk_base         1038 drivers/clk/tegra/clk-tegra-periph.c 	init_pllp(clk_base, pmc_base, tegra_clks, pll_params);
clk_base         1039 drivers/clk/tegra/clk-tegra-periph.c 	periph_clk_init(clk_base, tegra_clks);
clk_base         1040 drivers/clk/tegra/clk-tegra-periph.c 	gate_clk_init(clk_base, tegra_clks);
clk_base         1041 drivers/clk/tegra/clk-tegra-periph.c 	div_clk_init(clk_base, tegra_clks);
clk_base           95 drivers/clk/tegra/clk-tegra-super-gen4.c static void __init tegra_sclk_init(void __iomem *clk_base,
clk_base          109 drivers/clk/tegra/clk-tegra-super-gen4.c 						clk_base + SCLK_BURST_POLICY,
clk_base          119 drivers/clk/tegra/clk-tegra-super-gen4.c 						clk_base + SCLK_DIVIDER, 0, 8,
clk_base          132 drivers/clk/tegra/clk-tegra-super-gen4.c 						clk_base + SCLK_BURST_POLICY,
clk_base          142 drivers/clk/tegra/clk-tegra-super-gen4.c 				   clk_base + SYSTEM_CLK_RATE, 4, 2, 0,
clk_base          146 drivers/clk/tegra/clk-tegra-super-gen4.c 				clk_base + SYSTEM_CLK_RATE,
clk_base          157 drivers/clk/tegra/clk-tegra-super-gen4.c 				   clk_base + SYSTEM_CLK_RATE, 0, 2, 0,
clk_base          160 drivers/clk/tegra/clk-tegra-super-gen4.c 				CLK_IS_CRITICAL, clk_base + SYSTEM_CLK_RATE,
clk_base          165 drivers/clk/tegra/clk-tegra-super-gen4.c static void __init tegra_super_clk_init(void __iomem *clk_base,
clk_base          182 drivers/clk/tegra/clk-tegra-super-gen4.c 					clk_base + CCLKG_BURST_POLICY,
clk_base          189 drivers/clk/tegra/clk-tegra-super-gen4.c 					clk_base + CCLKG_BURST_POLICY,
clk_base          203 drivers/clk/tegra/clk-tegra-super-gen4.c 					clk_base + CCLKLP_BURST_POLICY,
clk_base          210 drivers/clk/tegra/clk-tegra-super-gen4.c 					clk_base + CCLKLP_BURST_POLICY,
clk_base          216 drivers/clk/tegra/clk-tegra-super-gen4.c 	tegra_sclk_init(clk_base, tegra_clks, gen_info);
clk_base          229 drivers/clk/tegra/clk-tegra-super-gen4.c 			clk_base, pmc_base, CLK_IGNORE_UNUSED, params, NULL);
clk_base          232 drivers/clk/tegra/clk-tegra-super-gen4.c 		clk = tegra_clk_register_pllxc("pll_x", "pll_ref", clk_base,
clk_base          248 drivers/clk/tegra/clk-tegra-super-gen4.c void __init tegra_super_clk_gen4_init(void __iomem *clk_base,
clk_base          253 drivers/clk/tegra/clk-tegra-super-gen4.c 	tegra_super_clk_init(clk_base, pmc_base, tegra_clks, params,
clk_base          257 drivers/clk/tegra/clk-tegra-super-gen4.c void __init tegra_super_clk_gen5_init(void __iomem *clk_base,
clk_base          262 drivers/clk/tegra/clk-tegra-super-gen4.c 	tegra_super_clk_init(clk_base, pmc_base, tegra_clks, params,
clk_base          130 drivers/clk/tegra/clk-tegra114.c static void __iomem *clk_base;
clk_base          896 drivers/clk/tegra/clk-tegra114.c static void __init tegra114_fixed_clk_init(void __iomem *clk_base)
clk_base          916 drivers/clk/tegra/clk-tegra114.c static void __init tegra114_pll_init(void __iomem *clk_base,
clk_base          922 drivers/clk/tegra/clk-tegra114.c 	clk = tegra_clk_register_pllxc("pll_c", "pll_ref", clk_base,
clk_base          928 drivers/clk/tegra/clk-tegra114.c 			clk_base + PLLC_OUT, 0, TEGRA_DIVIDER_ROUND_UP,
clk_base          931 drivers/clk/tegra/clk-tegra114.c 				clk_base + PLLC_OUT, 1, 0,
clk_base          936 drivers/clk/tegra/clk-tegra114.c 	clk = tegra_clk_register_pllc("pll_c2", "pll_ref", clk_base, pmc, 0,
clk_base          941 drivers/clk/tegra/clk-tegra114.c 	clk = tegra_clk_register_pllc("pll_c3", "pll_ref", clk_base, pmc, 0,
clk_base          946 drivers/clk/tegra/clk-tegra114.c 	clk = tegra_clk_register_pllm("pll_m", "pll_ref", clk_base, pmc,
clk_base          952 drivers/clk/tegra/clk-tegra114.c 				clk_base + PLLM_OUT, 0, TEGRA_DIVIDER_ROUND_UP,
clk_base          955 drivers/clk/tegra/clk-tegra114.c 				clk_base + PLLM_OUT, 1, 0, CLK_IGNORE_UNUSED |
clk_base          964 drivers/clk/tegra/clk-tegra114.c 	clk = tegra_clk_register_pllu_tegra114("pll_u", "pll_ref", clk_base, 0,
clk_base          970 drivers/clk/tegra/clk-tegra114.c 				CLK_SET_RATE_PARENT, clk_base + PLLU_BASE,
clk_base          990 drivers/clk/tegra/clk-tegra114.c 	clk = tegra_clk_register_pll("pll_d", "pll_ref", clk_base, pmc, 0,
clk_base         1000 drivers/clk/tegra/clk-tegra114.c 	clk = tegra_clk_register_pll("pll_d2", "pll_ref", clk_base, pmc, 0,
clk_base         1010 drivers/clk/tegra/clk-tegra114.c 	clk = tegra_clk_register_pllre("pll_re_vco", "pll_ref", clk_base, pmc,
clk_base         1015 drivers/clk/tegra/clk-tegra114.c 					 clk_base + PLLRE_BASE, 16, 4, 0,
clk_base         1021 drivers/clk/tegra/clk-tegra114.c 				      clk_base, 0, &pll_e_params, NULL);
clk_base         1031 drivers/clk/tegra/clk-tegra114.c static __init void tegra114_periph_clk_init(void __iomem *clk_base,
clk_base         1047 drivers/clk/tegra/clk-tegra114.c 			       clk_base + PLLD_BASE, 25, 1, 0, &pll_d_lock);
clk_base         1054 drivers/clk/tegra/clk-tegra114.c 			       clk_base + PLLD2_BASE, 25, 1, 0, &pll_d2_lock);
clk_base         1057 drivers/clk/tegra/clk-tegra114.c 	clk = tegra_clk_register_periph_gate("dsia", "dsia_mux", 0, clk_base,
clk_base         1061 drivers/clk/tegra/clk-tegra114.c 	clk = tegra_clk_register_periph_gate("dsib", "dsib_mux", 0, clk_base,
clk_base         1069 drivers/clk/tegra/clk-tegra114.c 			       clk_base + CLK_SOURCE_EMC,
clk_base         1072 drivers/clk/tegra/clk-tegra114.c 	clk = tegra_clk_register_mc("mc", "emc_mux", clk_base + CLK_SOURCE_EMC,
clk_base         1076 drivers/clk/tegra/clk-tegra114.c 	clk = tegra_clk_register_periph_gate("mipi-cal", "clk_m", 0, clk_base,
clk_base         1083 drivers/clk/tegra/clk-tegra114.c 		clk = tegra_clk_register_periph_data(clk_base, data);
clk_base         1087 drivers/clk/tegra/clk-tegra114.c 	tegra_periph_clk_init(clk_base, pmc_base, tegra114_clks,
clk_base         1097 drivers/clk/tegra/clk-tegra114.c 		reg = readl(clk_base + CLK_RST_CONTROLLER_CPU_CMPLX_STATUS);
clk_base         1112 drivers/clk/tegra/clk-tegra114.c 				readl(clk_base + CLK_SOURCE_CSITE);
clk_base         1113 drivers/clk/tegra/clk-tegra114.c 	writel(3 << 30, clk_base + CLK_SOURCE_CSITE);
clk_base         1116 drivers/clk/tegra/clk-tegra114.c 				readl(clk_base + CCLKG_BURST_POLICY);
clk_base         1118 drivers/clk/tegra/clk-tegra114.c 				readl(clk_base + CCLKG_BURST_POLICY + 4);
clk_base         1124 drivers/clk/tegra/clk-tegra114.c 					clk_base + CLK_SOURCE_CSITE);
clk_base         1127 drivers/clk/tegra/clk-tegra114.c 					clk_base + CCLKG_BURST_POLICY);
clk_base         1129 drivers/clk/tegra/clk-tegra114.c 					clk_base + CCLKG_BURST_POLICY + 4);
clk_base         1207 drivers/clk/tegra/clk-tegra114.c 	readl_relaxed(clk_base + CPU_FINETRIM_SELECT);
clk_base         1225 drivers/clk/tegra/clk-tegra114.c 	writel_relaxed(select, clk_base + CPU_FINETRIM_SELECT);
clk_base         1252 drivers/clk/tegra/clk-tegra114.c 	writel_relaxed(select, clk_base + CPU_FINETRIM_SELECT);
clk_base         1274 drivers/clk/tegra/clk-tegra114.c 	writel_relaxed(r, clk_base + CPU_FINETRIM_R);
clk_base         1283 drivers/clk/tegra/clk-tegra114.c 	writel_relaxed(dr, clk_base + CPU_FINETRIM_DR);
clk_base         1298 drivers/clk/tegra/clk-tegra114.c 	v = readl_relaxed(clk_base + RST_DFLL_DVCO);
clk_base         1300 drivers/clk/tegra/clk-tegra114.c 	writel_relaxed(v, clk_base + RST_DFLL_DVCO);
clk_base         1315 drivers/clk/tegra/clk-tegra114.c 	v = readl_relaxed(clk_base + RST_DFLL_DVCO);
clk_base         1317 drivers/clk/tegra/clk-tegra114.c 	writel_relaxed(v, clk_base + RST_DFLL_DVCO);
clk_base         1326 drivers/clk/tegra/clk-tegra114.c 	clk_base = of_iomap(np, 0);
clk_base         1327 drivers/clk/tegra/clk-tegra114.c 	if (!clk_base) {
clk_base         1346 drivers/clk/tegra/clk-tegra114.c 	clks = tegra_clk_init(clk_base, TEGRA114_CLK_CLK_MAX,
clk_base         1351 drivers/clk/tegra/clk-tegra114.c 	if (tegra_osc_clk_init(clk_base, tegra114_clks, tegra114_input_freq,
clk_base         1356 drivers/clk/tegra/clk-tegra114.c 	tegra114_fixed_clk_init(clk_base);
clk_base         1357 drivers/clk/tegra/clk-tegra114.c 	tegra114_pll_init(clk_base, pmc_base);
clk_base         1358 drivers/clk/tegra/clk-tegra114.c 	tegra114_periph_clk_init(clk_base, pmc_base);
clk_base         1359 drivers/clk/tegra/clk-tegra114.c 	tegra_audio_clk_init(clk_base, pmc_base, tegra114_clks,
clk_base         1363 drivers/clk/tegra/clk-tegra114.c 	tegra_super_clk_gen4_init(clk_base, pmc_base, tegra114_clks,
clk_base          102 drivers/clk/tegra/clk-tegra124.c static void __iomem *clk_base;
clk_base          992 drivers/clk/tegra/clk-tegra124.c static __init void tegra124_periph_clk_init(void __iomem *clk_base,
clk_base         1002 drivers/clk/tegra/clk-tegra124.c 	clk = tegra_clk_register_periph_fixed("dpaux", "pll_p", 0, clk_base,
clk_base         1007 drivers/clk/tegra/clk-tegra124.c 				clk_base + PLLD_MISC, 30, 0, &pll_d_lock);
clk_base         1011 drivers/clk/tegra/clk-tegra124.c 					     clk_base, 0, 48,
clk_base         1016 drivers/clk/tegra/clk-tegra124.c 					     clk_base, 0, 82,
clk_base         1020 drivers/clk/tegra/clk-tegra124.c 	clk = tegra_clk_register_mc("mc", "emc", clk_base + CLK_SOURCE_EMC,
clk_base         1025 drivers/clk/tegra/clk-tegra124.c 	clk = clk_register_gate(NULL, "cml0", "pll_e", 0, clk_base + PLLE_AUX,
clk_base         1031 drivers/clk/tegra/clk-tegra124.c 	clk = clk_register_gate(NULL, "cml1", "pll_e", 0, clk_base + PLLE_AUX,
clk_base         1036 drivers/clk/tegra/clk-tegra124.c 	tegra_periph_clk_init(clk_base, pmc_base, tegra124_clks, &pll_p_params);
clk_base         1039 drivers/clk/tegra/clk-tegra124.c static void __init tegra124_pll_init(void __iomem *clk_base,
clk_base         1045 drivers/clk/tegra/clk-tegra124.c 	clk = tegra_clk_register_pllxc("pll_c", "pll_ref", clk_base,
clk_base         1052 drivers/clk/tegra/clk-tegra124.c 			clk_base + PLLC_OUT, 0, TEGRA_DIVIDER_ROUND_UP,
clk_base         1055 drivers/clk/tegra/clk-tegra124.c 				clk_base + PLLC_OUT, 1, 0,
clk_base         1067 drivers/clk/tegra/clk-tegra124.c 	clk = tegra_clk_register_pllc("pll_c2", "pll_ref", clk_base, pmc, 0,
clk_base         1073 drivers/clk/tegra/clk-tegra124.c 	clk = tegra_clk_register_pllc("pll_c3", "pll_ref", clk_base, pmc, 0,
clk_base         1079 drivers/clk/tegra/clk-tegra124.c 	clk = tegra_clk_register_pllm("pll_m", "pll_ref", clk_base, pmc,
clk_base         1086 drivers/clk/tegra/clk-tegra124.c 				clk_base + PLLM_OUT, 0, TEGRA_DIVIDER_ROUND_UP,
clk_base         1089 drivers/clk/tegra/clk-tegra124.c 				clk_base + PLLM_OUT, 1, 0,
clk_base         1101 drivers/clk/tegra/clk-tegra124.c 	clk = tegra_clk_register_pllu_tegra114("pll_u", "pll_ref", clk_base, 0,
clk_base         1108 drivers/clk/tegra/clk-tegra124.c 				CLK_SET_RATE_PARENT, clk_base + PLLU_BASE,
clk_base         1132 drivers/clk/tegra/clk-tegra124.c 	clk = tegra_clk_register_pll("pll_d", "pll_ref", clk_base, pmc, 0,
clk_base         1144 drivers/clk/tegra/clk-tegra124.c 	clk = tegra_clk_register_pllre("pll_re_vco", "pll_ref", clk_base, pmc,
clk_base         1150 drivers/clk/tegra/clk-tegra124.c 					 clk_base + PLLRE_BASE, 16, 4, 0,
clk_base         1157 drivers/clk/tegra/clk-tegra124.c 				      clk_base, 0, &pll_e_params, NULL);
clk_base         1162 drivers/clk/tegra/clk-tegra124.c 	clk = tegra_clk_register_pllss("pll_c4", "pll_ref", clk_base, 0,
clk_base         1168 drivers/clk/tegra/clk-tegra124.c 	clk = tegra_clk_register_pllss("pll_dp", "pll_ref", clk_base, 0,
clk_base         1174 drivers/clk/tegra/clk-tegra124.c 	clk = tegra_clk_register_pllss("pll_d2", "pll_ref", clk_base, 0,
clk_base         1193 drivers/clk/tegra/clk-tegra124.c 		reg = readl(clk_base + CLK_RST_CONTROLLER_CPU_CMPLX_STATUS);
clk_base         1208 drivers/clk/tegra/clk-tegra124.c 				readl(clk_base + CLK_SOURCE_CSITE);
clk_base         1209 drivers/clk/tegra/clk-tegra124.c 	writel(3 << 30, clk_base + CLK_SOURCE_CSITE);
clk_base         1212 drivers/clk/tegra/clk-tegra124.c 				readl(clk_base + CCLKG_BURST_POLICY);
clk_base         1214 drivers/clk/tegra/clk-tegra124.c 				readl(clk_base + CCLKG_BURST_POLICY + 4);
clk_base         1220 drivers/clk/tegra/clk-tegra124.c 				clk_base + CLK_SOURCE_CSITE);
clk_base         1223 drivers/clk/tegra/clk-tegra124.c 					clk_base + CCLKG_BURST_POLICY);
clk_base         1225 drivers/clk/tegra/clk-tegra124.c 					clk_base + CCLKG_BURST_POLICY + 4);
clk_base         1335 drivers/clk/tegra/clk-tegra124.c 	readl_relaxed(clk_base + RST_DFLL_DVCO);
clk_base         1347 drivers/clk/tegra/clk-tegra124.c 	v = readl_relaxed(clk_base + RST_DFLL_DVCO);
clk_base         1349 drivers/clk/tegra/clk-tegra124.c 	writel_relaxed(v, clk_base + RST_DFLL_DVCO);
clk_base         1363 drivers/clk/tegra/clk-tegra124.c 	v = readl_relaxed(clk_base + RST_DFLL_DVCO);
clk_base         1365 drivers/clk/tegra/clk-tegra124.c 	writel_relaxed(v, clk_base + RST_DFLL_DVCO);
clk_base         1418 drivers/clk/tegra/clk-tegra124.c 	clk_base = of_iomap(np, 0);
clk_base         1419 drivers/clk/tegra/clk-tegra124.c 	if (!clk_base) {
clk_base         1438 drivers/clk/tegra/clk-tegra124.c 	clks = tegra_clk_init(clk_base, TEGRA124_CLK_CLK_MAX,
clk_base         1443 drivers/clk/tegra/clk-tegra124.c 	if (tegra_osc_clk_init(clk_base, tegra124_clks, tegra124_input_freq,
clk_base         1449 drivers/clk/tegra/clk-tegra124.c 	tegra124_pll_init(clk_base, pmc_base);
clk_base         1450 drivers/clk/tegra/clk-tegra124.c 	tegra124_periph_clk_init(clk_base, pmc_base);
clk_base         1451 drivers/clk/tegra/clk-tegra124.c 	tegra_audio_clk_init(clk_base, pmc_base, tegra124_clks,
clk_base         1457 drivers/clk/tegra/clk-tegra124.c 	plld_base = readl(clk_base + PLLD_BASE);
clk_base         1459 drivers/clk/tegra/clk-tegra124.c 	writel(plld_base, clk_base + PLLD_BASE);
clk_base         1474 drivers/clk/tegra/clk-tegra124.c 	tegra_super_clk_gen4_init(clk_base, pmc_base, tegra124_clks,
clk_base         1480 drivers/clk/tegra/clk-tegra124.c 	clks[TEGRA124_CLK_EMC] = tegra_clk_register_emc(clk_base, np,
clk_base          130 drivers/clk/tegra/clk-tegra20.c static void __iomem *clk_base;
clk_base          574 drivers/clk/tegra/clk-tegra20.c 	u32 osc_ctrl = readl_relaxed(clk_base + OSC_CTRL);
clk_base          608 drivers/clk/tegra/clk-tegra20.c 	u32 pll_ref_div = readl_relaxed(clk_base + OSC_CTRL) &
clk_base          630 drivers/clk/tegra/clk-tegra20.c 	clk = tegra_clk_register_pll("pll_c", "pll_ref", clk_base, NULL, 0,
clk_base          636 drivers/clk/tegra/clk-tegra20.c 				clk_base + PLLC_OUT, 0, TEGRA_DIVIDER_ROUND_UP,
clk_base          639 drivers/clk/tegra/clk-tegra20.c 				clk_base + PLLC_OUT, 1, 0, CLK_SET_RATE_PARENT,
clk_base          644 drivers/clk/tegra/clk-tegra20.c 	clk = tegra_clk_register_pll("pll_m", "pll_ref", clk_base, NULL,
clk_base          650 drivers/clk/tegra/clk-tegra20.c 				clk_base + PLLM_OUT, 0, TEGRA_DIVIDER_ROUND_UP,
clk_base          653 drivers/clk/tegra/clk-tegra20.c 				clk_base + PLLM_OUT, 1, 0,
clk_base          658 drivers/clk/tegra/clk-tegra20.c 	clk = tegra_clk_register_pll("pll_x", "pll_ref", clk_base, NULL, 0,
clk_base          663 drivers/clk/tegra/clk-tegra20.c 	clk = tegra_clk_register_pll("pll_u", "pll_ref", clk_base, NULL, 0,
clk_base          668 drivers/clk/tegra/clk-tegra20.c 	clk = tegra_clk_register_pll("pll_d", "pll_ref", clk_base, NULL, 0,
clk_base          678 drivers/clk/tegra/clk-tegra20.c 	clk = tegra_clk_register_pll("pll_a", "pll_p_out1", clk_base, NULL, 0,
clk_base          684 drivers/clk/tegra/clk-tegra20.c 				clk_base + PLLA_OUT, 0, TEGRA_DIVIDER_ROUND_UP,
clk_base          687 drivers/clk/tegra/clk-tegra20.c 				clk_base + PLLA_OUT, 1, 0, CLK_IGNORE_UNUSED |
clk_base          692 drivers/clk/tegra/clk-tegra20.c 	clk = tegra_clk_register_plle("pll_e", "pll_ref", clk_base, pmc_base,
clk_base          711 drivers/clk/tegra/clk-tegra20.c 			      clk_base + CCLK_BURST_POLICY, 0, 4, 0, 0, NULL);
clk_base          718 drivers/clk/tegra/clk-tegra20.c 			      clk_base + SCLK_BURST_POLICY, 0, 4, 0, 0, NULL);
clk_base          738 drivers/clk/tegra/clk-tegra20.c 				clk_base + AUDIO_SYNC_CLK, 0, 3, 0, NULL);
clk_base          740 drivers/clk/tegra/clk-tegra20.c 				clk_base + AUDIO_SYNC_CLK, 4,
clk_base          748 drivers/clk/tegra/clk-tegra20.c 				    TEGRA_PERIPH_NO_RESET, clk_base,
clk_base          799 drivers/clk/tegra/clk-tegra20.c 			       clk_base + CLK_SOURCE_EMC,
clk_base          802 drivers/clk/tegra/clk-tegra20.c 	clk = tegra_clk_register_mc("mc", "emc_mux", clk_base + CLK_SOURCE_EMC,
clk_base          807 drivers/clk/tegra/clk-tegra20.c 	emc_reg = readl_relaxed(clk_base + CLK_SOURCE_EMC);
clk_base          820 drivers/clk/tegra/clk-tegra20.c 				clk_base + CLK_SOURCE_EMC, CLK_IS_CRITICAL,
clk_base          834 drivers/clk/tegra/clk-tegra20.c 				    clk_base, 0, 3, periph_clk_enb_refcnt);
clk_base          841 drivers/clk/tegra/clk-tegra20.c 	clk = tegra_clk_register_periph_gate("dsi", "pll_d", 0, clk_base, 0,
clk_base          847 drivers/clk/tegra/clk-tegra20.c 	clk = tegra_clk_register_periph_gate("pex", "clk_m", 0, clk_base, 0, 70,
clk_base          853 drivers/clk/tegra/clk-tegra20.c 			     0, clk_base + MISC_CLK_ENB, 22, 2,
clk_base          859 drivers/clk/tegra/clk-tegra20.c 			     0, clk_base + MISC_CLK_ENB, 20, 2,
clk_base          865 drivers/clk/tegra/clk-tegra20.c 				    clk_base, 0, 94, periph_clk_enb_refcnt);
clk_base          870 drivers/clk/tegra/clk-tegra20.c 				    clk_base, 0, 93, periph_clk_enb_refcnt);
clk_base          875 drivers/clk/tegra/clk-tegra20.c 		clk = tegra_clk_register_periph_data(clk_base, data);
clk_base          884 drivers/clk/tegra/clk-tegra20.c 					clk_base, data->offset);
clk_base          888 drivers/clk/tegra/clk-tegra20.c 	tegra_periph_clk_init(clk_base, pmc_base, tegra20_clks, &pll_p_params);
clk_base          917 drivers/clk/tegra/clk-tegra20.c 		reg = readl(clk_base +
clk_base          928 drivers/clk/tegra/clk-tegra20.c 	       clk_base + TEGRA_CLK_RST_CONTROLLER_RST_CPU_CMPLX_SET);
clk_base          935 drivers/clk/tegra/clk-tegra20.c 	       clk_base + TEGRA_CLK_RST_CONTROLLER_RST_CPU_CMPLX_CLR);
clk_base          943 drivers/clk/tegra/clk-tegra20.c 	reg = readl(clk_base + TEGRA_CLK_RST_CONTROLLER_CLK_CPU_CMPLX);
clk_base          945 drivers/clk/tegra/clk-tegra20.c 	       clk_base + TEGRA_CLK_RST_CONTROLLER_CLK_CPU_CMPLX);
clk_base          947 drivers/clk/tegra/clk-tegra20.c 	reg = readl(clk_base + TEGRA_CLK_RST_CONTROLLER_CLK_CPU_CMPLX);
clk_base          954 drivers/clk/tegra/clk-tegra20.c 	reg = readl(clk_base + TEGRA_CLK_RST_CONTROLLER_CLK_CPU_CMPLX);
clk_base          956 drivers/clk/tegra/clk-tegra20.c 	       clk_base + TEGRA_CLK_RST_CONTROLLER_CLK_CPU_CMPLX);
clk_base          964 drivers/clk/tegra/clk-tegra20.c 	cpu_rst_status = readl(clk_base +
clk_base          974 drivers/clk/tegra/clk-tegra20.c 				readl(clk_base + CLK_SOURCE_CSITE);
clk_base          975 drivers/clk/tegra/clk-tegra20.c 	writel(3<<30, clk_base + CLK_SOURCE_CSITE);
clk_base          978 drivers/clk/tegra/clk-tegra20.c 				readl(clk_base + CCLK_BURST_POLICY);
clk_base          980 drivers/clk/tegra/clk-tegra20.c 				readl(clk_base + PLLX_BASE);
clk_base          982 drivers/clk/tegra/clk-tegra20.c 				readl(clk_base + PLLX_MISC);
clk_base          984 drivers/clk/tegra/clk-tegra20.c 				readl(clk_base + SUPER_CCLK_DIVIDER);
clk_base          992 drivers/clk/tegra/clk-tegra20.c 	reg = readl(clk_base + CCLK_BURST_POLICY);
clk_base         1005 drivers/clk/tegra/clk-tegra20.c 					clk_base + PLLX_MISC);
clk_base         1007 drivers/clk/tegra/clk-tegra20.c 					clk_base + PLLX_BASE);
clk_base         1019 drivers/clk/tegra/clk-tegra20.c 					clk_base + SUPER_CCLK_DIVIDER);
clk_base         1021 drivers/clk/tegra/clk-tegra20.c 					clk_base + CCLK_BURST_POLICY);
clk_base         1024 drivers/clk/tegra/clk-tegra20.c 					clk_base + CLK_SOURCE_CSITE);
clk_base         1141 drivers/clk/tegra/clk-tegra20.c 	clk_base = of_iomap(np, 0);
clk_base         1142 drivers/clk/tegra/clk-tegra20.c 	if (!clk_base) {
clk_base         1159 drivers/clk/tegra/clk-tegra20.c 	clks = tegra_clk_init(clk_base, TEGRA20_CLK_CLK_MAX,
clk_base         1168 drivers/clk/tegra/clk-tegra20.c 	tegra_super_clk_gen4_init(clk_base, pmc_base, tegra20_clks, NULL);
clk_base          288 drivers/clk/tegra/clk-tegra210.c static void __iomem *clk_base;
clk_base          491 drivers/clk/tegra/clk-tegra210.c 	val = readl_relaxed(clk_base + XUSBIO_PLL_CFG0);
clk_base          496 drivers/clk/tegra/clk-tegra210.c 	writel_relaxed(val, clk_base + XUSBIO_PLL_CFG0);
clk_base          504 drivers/clk/tegra/clk-tegra210.c 	val = readl_relaxed(clk_base + XUSBIO_PLL_CFG0);
clk_base          506 drivers/clk/tegra/clk-tegra210.c 	writel_relaxed(val, clk_base + XUSBIO_PLL_CFG0);
clk_base          514 drivers/clk/tegra/clk-tegra210.c 	val = readl_relaxed(clk_base + SATA_PLL_CFG0);
clk_base          518 drivers/clk/tegra/clk-tegra210.c 	writel_relaxed(val, clk_base + SATA_PLL_CFG0);
clk_base          526 drivers/clk/tegra/clk-tegra210.c 	val = readl_relaxed(clk_base + SATA_PLL_CFG0);
clk_base          528 drivers/clk/tegra/clk-tegra210.c 	writel_relaxed(val, clk_base + SATA_PLL_CFG0);
clk_base          536 drivers/clk/tegra/clk-tegra210.c 	val = readl_relaxed(clk_base + SATA_PLL_CFG0);
clk_base          548 drivers/clk/tegra/clk-tegra210.c 	writel_relaxed(val, clk_base + SATA_PLL_CFG0);
clk_base          556 drivers/clk/tegra/clk-tegra210.c 	val = readl_relaxed(clk_base + mbist->lvl2_offset);
clk_base          557 drivers/clk/tegra/clk-tegra210.c 	writel_relaxed(val | mbist->lvl2_mask, clk_base + mbist->lvl2_offset);
clk_base          558 drivers/clk/tegra/clk-tegra210.c 	fence_udelay(1, clk_base);
clk_base          559 drivers/clk/tegra/clk-tegra210.c 	writel_relaxed(val, clk_base + mbist->lvl2_offset);
clk_base          560 drivers/clk/tegra/clk-tegra210.c 	fence_udelay(1, clk_base);
clk_base          570 drivers/clk/tegra/clk-tegra210.c 	csi_src = readl_relaxed(clk_base + PLLD_BASE);
clk_base          571 drivers/clk/tegra/clk-tegra210.c 	writel_relaxed(csi_src | PLLD_BASE_CSI_CLKSOURCE, clk_base + PLLD_BASE);
clk_base          572 drivers/clk/tegra/clk-tegra210.c 	fence_udelay(1, clk_base);
clk_base          574 drivers/clk/tegra/clk-tegra210.c 	ovra = readl_relaxed(clk_base + LVL2_CLK_GATE_OVRA);
clk_base          575 drivers/clk/tegra/clk-tegra210.c 	writel_relaxed(ovra | BIT(15), clk_base + LVL2_CLK_GATE_OVRA);
clk_base          576 drivers/clk/tegra/clk-tegra210.c 	ovre = readl_relaxed(clk_base + LVL2_CLK_GATE_OVRE);
clk_base          577 drivers/clk/tegra/clk-tegra210.c 	writel_relaxed(ovre | BIT(3), clk_base + LVL2_CLK_GATE_OVRE);
clk_base          578 drivers/clk/tegra/clk-tegra210.c 	fence_udelay(1, clk_base);
clk_base          580 drivers/clk/tegra/clk-tegra210.c 	writel_relaxed(ovra, clk_base + LVL2_CLK_GATE_OVRA);
clk_base          581 drivers/clk/tegra/clk-tegra210.c 	writel_relaxed(ovre, clk_base + LVL2_CLK_GATE_OVRE);
clk_base          582 drivers/clk/tegra/clk-tegra210.c 	writel_relaxed(csi_src, clk_base + PLLD_BASE);
clk_base          583 drivers/clk/tegra/clk-tegra210.c 	fence_udelay(1, clk_base);
clk_base          592 drivers/clk/tegra/clk-tegra210.c 	ovra = readl_relaxed(clk_base + LVL2_CLK_GATE_OVRA);
clk_base          593 drivers/clk/tegra/clk-tegra210.c 	writel_relaxed(ovra | BIT(1), clk_base + LVL2_CLK_GATE_OVRA);
clk_base          594 drivers/clk/tegra/clk-tegra210.c 	fence_udelay(1, clk_base);
clk_base          602 drivers/clk/tegra/clk-tegra210.c 	writel_relaxed(ovra, clk_base + LVL2_CLK_GATE_OVRA);
clk_base          603 drivers/clk/tegra/clk-tegra210.c 	fence_udelay(1, clk_base);
clk_base          610 drivers/clk/tegra/clk-tegra210.c 	ovre = readl_relaxed(clk_base + LVL2_CLK_GATE_OVRE);
clk_base          611 drivers/clk/tegra/clk-tegra210.c 	writel_relaxed(ovre | BIT(5), clk_base + LVL2_CLK_GATE_OVRE);
clk_base          612 drivers/clk/tegra/clk-tegra210.c 	fence_udelay(1, clk_base);
clk_base          622 drivers/clk/tegra/clk-tegra210.c 	writel_relaxed(ovre, clk_base + LVL2_CLK_GATE_OVRE);
clk_base          623 drivers/clk/tegra/clk-tegra210.c 	fence_udelay(1, clk_base);
clk_base          632 drivers/clk/tegra/clk-tegra210.c 	ovrc = readl_relaxed(clk_base + LVL2_CLK_GATE_OVRC);
clk_base          633 drivers/clk/tegra/clk-tegra210.c 	ovre = readl_relaxed(clk_base + LVL2_CLK_GATE_OVRE);
clk_base          634 drivers/clk/tegra/clk-tegra210.c 	writel_relaxed(ovrc | BIT(1), clk_base + LVL2_CLK_GATE_OVRC);
clk_base          636 drivers/clk/tegra/clk-tegra210.c 			clk_base + LVL2_CLK_GATE_OVRE);
clk_base          637 drivers/clk/tegra/clk-tegra210.c 	fence_udelay(1, clk_base);
clk_base          656 drivers/clk/tegra/clk-tegra210.c 	writel_relaxed(ovrc, clk_base + LVL2_CLK_GATE_OVRC);
clk_base          657 drivers/clk/tegra/clk-tegra210.c 	writel_relaxed(ovre, clk_base + LVL2_CLK_GATE_OVRE);
clk_base          658 drivers/clk/tegra/clk-tegra210.c 	fence_udelay(1, clk_base);
clk_base          687 drivers/clk/tegra/clk-tegra210.c 	_pll_misc_chk_default(clk_base, params, 0, default_val,
clk_base          691 drivers/clk/tegra/clk-tegra210.c 	_pll_misc_chk_default(clk_base, params, 1, default_val,
clk_base          695 drivers/clk/tegra/clk-tegra210.c 	_pll_misc_chk_default(clk_base, params, 2, default_val,
clk_base          699 drivers/clk/tegra/clk-tegra210.c 	_pll_misc_chk_default(clk_base, params, 3, default_val,
clk_base          708 drivers/clk/tegra/clk-tegra210.c 	if (readl_relaxed(clk_base + pllcx->params->base_reg) & PLL_ENABLE) {
clk_base          719 drivers/clk/tegra/clk-tegra210.c 			clk_base + pllcx->params->ext_misc_reg[0]);
clk_base          721 drivers/clk/tegra/clk-tegra210.c 			clk_base + pllcx->params->ext_misc_reg[1]);
clk_base          723 drivers/clk/tegra/clk-tegra210.c 			clk_base + pllcx->params->ext_misc_reg[2]);
clk_base          725 drivers/clk/tegra/clk-tegra210.c 			clk_base + pllcx->params->ext_misc_reg[3]);
clk_base          757 drivers/clk/tegra/clk-tegra210.c 	u32 val = readl_relaxed(clk_base + plla->params->base_reg);
clk_base          775 drivers/clk/tegra/clk-tegra210.c 		_pll_misc_chk_default(clk_base, plla->params, 0, val,
clk_base          779 drivers/clk/tegra/clk-tegra210.c 		_pll_misc_chk_default(clk_base, plla->params, 2, val,
clk_base          783 drivers/clk/tegra/clk-tegra210.c 		val = readl_relaxed(clk_base + plla->params->ext_misc_reg[0]);
clk_base          786 drivers/clk/tegra/clk-tegra210.c 		writel_relaxed(val, clk_base + plla->params->ext_misc_reg[0]);
clk_base          794 drivers/clk/tegra/clk-tegra210.c 	writel_relaxed(val, clk_base + plla->params->base_reg);
clk_base          796 drivers/clk/tegra/clk-tegra210.c 			clk_base + plla->params->ext_misc_reg[0]);
clk_base          798 drivers/clk/tegra/clk-tegra210.c 			clk_base + plla->params->ext_misc_reg[2]);
clk_base          813 drivers/clk/tegra/clk-tegra210.c 	if (readl_relaxed(clk_base + plld->params->base_reg) &
clk_base          821 drivers/clk/tegra/clk-tegra210.c 		_pll_misc_chk_default(clk_base, plld->params, 1,
clk_base          828 drivers/clk/tegra/clk-tegra210.c 		_pll_misc_chk_default(clk_base, plld->params, 0, val,
clk_base          836 drivers/clk/tegra/clk-tegra210.c 		val = readl_relaxed(clk_base + plld->params->ext_misc_reg[0]);
clk_base          839 drivers/clk/tegra/clk-tegra210.c 		writel_relaxed(val, clk_base + plld->params->ext_misc_reg[0]);
clk_base          845 drivers/clk/tegra/clk-tegra210.c 	val = readl_relaxed(clk_base + plld->params->ext_misc_reg[0]);
clk_base          849 drivers/clk/tegra/clk-tegra210.c 	writel_relaxed(val, clk_base + plld->params->ext_misc_reg[0]);
clk_base          850 drivers/clk/tegra/clk-tegra210.c 	writel_relaxed(PLLD_MISC1_DEFAULT_VALUE, clk_base +
clk_base          863 drivers/clk/tegra/clk-tegra210.c 	u32 val = readl_relaxed(clk_base + plldss->params->base_reg);
clk_base          880 drivers/clk/tegra/clk-tegra210.c 		_pll_misc_chk_default(clk_base, plldss->params, 0, default_val,
clk_base          891 drivers/clk/tegra/clk-tegra210.c 			_pll_misc_chk_default(clk_base, plldss->params, 1,
clk_base          894 drivers/clk/tegra/clk-tegra210.c 			_pll_misc_chk_default(clk_base, plldss->params, 2,
clk_base          897 drivers/clk/tegra/clk-tegra210.c 			_pll_misc_chk_default(clk_base, plldss->params, 3,
clk_base          901 drivers/clk/tegra/clk-tegra210.c 			_pll_misc_chk_default(clk_base, plldss->params, 1,
clk_base          913 drivers/clk/tegra/clk-tegra210.c 			writel_relaxed(val, clk_base +
clk_base          917 drivers/clk/tegra/clk-tegra210.c 		val = readl_relaxed(clk_base + plldss->params->ext_misc_reg[0]);
clk_base          920 drivers/clk/tegra/clk-tegra210.c 		writel_relaxed(val, clk_base + plldss->params->ext_misc_reg[0]);
clk_base          929 drivers/clk/tegra/clk-tegra210.c 	writel_relaxed(val, clk_base + plldss->params->base_reg);
clk_base          933 drivers/clk/tegra/clk-tegra210.c 		writel_relaxed(misc0_val, clk_base +
clk_base          939 drivers/clk/tegra/clk-tegra210.c 	writel_relaxed(misc0_val, clk_base +
clk_base          943 drivers/clk/tegra/clk-tegra210.c 			clk_base + plldss->params->ext_misc_reg[1]);
clk_base          944 drivers/clk/tegra/clk-tegra210.c 	writel_relaxed(misc2_val, clk_base + plldss->params->ext_misc_reg[2]);
clk_base          945 drivers/clk/tegra/clk-tegra210.c 	writel_relaxed(misc3_val, clk_base + plldss->params->ext_misc_reg[3]);
clk_base          982 drivers/clk/tegra/clk-tegra210.c 	u32 val = readl_relaxed(clk_base + pllre->params->base_reg);
clk_base         1003 drivers/clk/tegra/clk-tegra210.c 		_pll_misc_chk_default(clk_base, pllre->params, 0, val,
clk_base         1007 drivers/clk/tegra/clk-tegra210.c 		val = readl_relaxed(clk_base + pllre->params->ext_misc_reg[0]);
clk_base         1014 drivers/clk/tegra/clk-tegra210.c 		writel_relaxed(val, clk_base + pllre->params->ext_misc_reg[0]);
clk_base         1026 drivers/clk/tegra/clk-tegra210.c 	writel_relaxed(val, clk_base + pllre->params->base_reg);
clk_base         1028 drivers/clk/tegra/clk-tegra210.c 			clk_base + pllre->params->ext_misc_reg[0]);
clk_base         1072 drivers/clk/tegra/clk-tegra210.c 	_pll_misc_chk_default(clk_base, pll->params, 0, default_val,
clk_base         1076 drivers/clk/tegra/clk-tegra210.c 	_pll_misc_chk_default(clk_base, pll->params, 1, default_val,
clk_base         1081 drivers/clk/tegra/clk-tegra210.c 	_pll_misc_chk_default(clk_base, pll->params, 2,
clk_base         1085 drivers/clk/tegra/clk-tegra210.c 	_pll_misc_chk_default(clk_base, pll->params, 3, default_val,
clk_base         1089 drivers/clk/tegra/clk-tegra210.c 	_pll_misc_chk_default(clk_base, pll->params, 4, default_val,
clk_base         1093 drivers/clk/tegra/clk-tegra210.c 	_pll_misc_chk_default(clk_base, pll->params, 5, default_val,
clk_base         1111 drivers/clk/tegra/clk-tegra210.c 	if (readl_relaxed(clk_base + pllx->params->base_reg) & PLL_ENABLE) {
clk_base         1122 drivers/clk/tegra/clk-tegra210.c 		writel_relaxed(val, clk_base + pllx->params->ext_misc_reg[2]);
clk_base         1125 drivers/clk/tegra/clk-tegra210.c 		val = readl_relaxed(clk_base + pllx->params->ext_misc_reg[0]);
clk_base         1128 drivers/clk/tegra/clk-tegra210.c 		writel_relaxed(val, clk_base + pllx->params->ext_misc_reg[0]);
clk_base         1135 drivers/clk/tegra/clk-tegra210.c 	writel_relaxed(PLLX_MISC0_DEFAULT_VALUE, clk_base +
clk_base         1139 drivers/clk/tegra/clk-tegra210.c 	writel_relaxed(PLLX_MISC1_DEFAULT_VALUE, clk_base +
clk_base         1143 drivers/clk/tegra/clk-tegra210.c 	writel_relaxed(val, clk_base + pllx->params->ext_misc_reg[2]);
clk_base         1146 drivers/clk/tegra/clk-tegra210.c 	writel_relaxed(PLLX_MISC3_DEFAULT_VALUE, clk_base +
clk_base         1150 drivers/clk/tegra/clk-tegra210.c 	writel_relaxed(PLLX_MISC4_DEFAULT_VALUE, clk_base +
clk_base         1152 drivers/clk/tegra/clk-tegra210.c 	writel_relaxed(PLLX_MISC5_DEFAULT_VALUE, clk_base +
clk_base         1160 drivers/clk/tegra/clk-tegra210.c 	u32 mask, val = readl_relaxed(clk_base + pllmb->params->base_reg);
clk_base         1172 drivers/clk/tegra/clk-tegra210.c 		_pll_misc_chk_default(clk_base, pllmb->params, 0, val,
clk_base         1178 drivers/clk/tegra/clk-tegra210.c 		val = readl_relaxed(clk_base + pllmb->params->ext_misc_reg[0]);
clk_base         1181 drivers/clk/tegra/clk-tegra210.c 		writel_relaxed(val, clk_base + pllmb->params->ext_misc_reg[0]);
clk_base         1189 drivers/clk/tegra/clk-tegra210.c 			clk_base + pllmb->params->ext_misc_reg[0]);
clk_base         1208 drivers/clk/tegra/clk-tegra210.c 	_pll_misc_chk_default(clk_base, pll->params, 0, val,
clk_base         1214 drivers/clk/tegra/clk-tegra210.c 	_pll_misc_chk_default(clk_base, pll->params, 1, val,
clk_base         1221 drivers/clk/tegra/clk-tegra210.c 	u32 val = readl_relaxed(clk_base + pllp->params->base_reg);
clk_base         1236 drivers/clk/tegra/clk-tegra210.c 		val = readl_relaxed(clk_base + pllp->params->ext_misc_reg[0]);
clk_base         1240 drivers/clk/tegra/clk-tegra210.c 		writel_relaxed(val, clk_base + pllp->params->ext_misc_reg[0]);
clk_base         1248 drivers/clk/tegra/clk-tegra210.c 			clk_base + pllp->params->ext_misc_reg[0]);
clk_base         1251 drivers/clk/tegra/clk-tegra210.c 	val = readl_relaxed(clk_base + pllp->params->ext_misc_reg[1]);
clk_base         1255 drivers/clk/tegra/clk-tegra210.c 	writel_relaxed(val, clk_base + pllp->params->ext_misc_reg[1]);
clk_base         1273 drivers/clk/tegra/clk-tegra210.c 	_pll_misc_chk_default(clk_base, params, 0, val,
clk_base         1278 drivers/clk/tegra/clk-tegra210.c 	_pll_misc_chk_default(clk_base, params, 1, val,
clk_base         1284 drivers/clk/tegra/clk-tegra210.c 	u32 val = readl_relaxed(clk_base + pllu->base_reg);
clk_base         1299 drivers/clk/tegra/clk-tegra210.c 		val = readl_relaxed(clk_base + pllu->ext_misc_reg[0]);
clk_base         1302 drivers/clk/tegra/clk-tegra210.c 		writel_relaxed(val, clk_base + pllu->ext_misc_reg[0]);
clk_base         1304 drivers/clk/tegra/clk-tegra210.c 		val = readl_relaxed(clk_base + pllu->ext_misc_reg[1]);
clk_base         1307 drivers/clk/tegra/clk-tegra210.c 		writel_relaxed(val, clk_base + pllu->ext_misc_reg[1]);
clk_base         1315 drivers/clk/tegra/clk-tegra210.c 			clk_base + pllu->ext_misc_reg[0]);
clk_base         1317 drivers/clk/tegra/clk-tegra210.c 			clk_base + pllu->ext_misc_reg[1]);
clk_base         1344 drivers/clk/tegra/clk-tegra210.c 		val = readl_relaxed(clk_base + reg);
clk_base         1361 drivers/clk/tegra/clk-tegra210.c 	val = readl_relaxed(clk_base + pllx->params->ext_misc_reg[2]);
clk_base         1364 drivers/clk/tegra/clk-tegra210.c 	writel_relaxed(val, clk_base + pllx->params->ext_misc_reg[2]);
clk_base         1367 drivers/clk/tegra/clk-tegra210.c 	val = readl_relaxed(clk_base + pllx->params->ext_misc_reg[2]);
clk_base         1369 drivers/clk/tegra/clk-tegra210.c 	writel_relaxed(val, clk_base + pllx->params->ext_misc_reg[2]);
clk_base         1375 drivers/clk/tegra/clk-tegra210.c 	base = readl_relaxed(clk_base + pllx->params->base_reg) &
clk_base         1378 drivers/clk/tegra/clk-tegra210.c 	writel_relaxed(base, clk_base + pllx->params->base_reg);
clk_base         1382 drivers/clk/tegra/clk-tegra210.c 	writel_relaxed(val, clk_base + pllx->params->ext_misc_reg[2]);
clk_base         2710 drivers/clk/tegra/clk-tegra210.c 	reg = readl_relaxed(clk_base + UTMIPLL_HW_PWRDN_CFG0);
clk_base         2718 drivers/clk/tegra/clk-tegra210.c 	writel_relaxed(reg, clk_base + UTMIPLL_HW_PWRDN_CFG0);
clk_base         2726 drivers/clk/tegra/clk-tegra210.c 	reg = readl_relaxed(clk_base + UTMIPLL_HW_PWRDN_CFG0);
clk_base         2728 drivers/clk/tegra/clk-tegra210.c 	writel_relaxed(reg, clk_base + UTMIPLL_HW_PWRDN_CFG0);
clk_base         2748 drivers/clk/tegra/clk-tegra210.c 	reg = readl_relaxed(clk_base + UTMIPLL_HW_PWRDN_CFG0);
clk_base         2750 drivers/clk/tegra/clk-tegra210.c 	writel_relaxed(reg, clk_base + UTMIPLL_HW_PWRDN_CFG0);
clk_base         2754 drivers/clk/tegra/clk-tegra210.c 	reg = readl_relaxed(clk_base + UTMIP_PLL_CFG2);
clk_base         2764 drivers/clk/tegra/clk-tegra210.c 	writel_relaxed(reg, clk_base + UTMIP_PLL_CFG2);
clk_base         2767 drivers/clk/tegra/clk-tegra210.c 	reg = readl_relaxed(clk_base + UTMIP_PLL_CFG1);
clk_base         2778 drivers/clk/tegra/clk-tegra210.c 	writel_relaxed(reg, clk_base + UTMIP_PLL_CFG1);
clk_base         2781 drivers/clk/tegra/clk-tegra210.c 	reg = readl_relaxed(clk_base + UTMIP_PLL_CFG1);
clk_base         2784 drivers/clk/tegra/clk-tegra210.c 	writel_relaxed(reg, clk_base + UTMIP_PLL_CFG1);
clk_base         2789 drivers/clk/tegra/clk-tegra210.c 	reg = readl_relaxed(clk_base + UTMIP_PLL_CFG2);
clk_base         2796 drivers/clk/tegra/clk-tegra210.c 	writel_relaxed(reg, clk_base + UTMIP_PLL_CFG2);
clk_base         2799 drivers/clk/tegra/clk-tegra210.c 	reg = readl_relaxed(clk_base + UTMIP_PLL_CFG1);
clk_base         2802 drivers/clk/tegra/clk-tegra210.c 	writel_relaxed(reg, clk_base + UTMIP_PLL_CFG1);
clk_base         2804 drivers/clk/tegra/clk-tegra210.c 	reg = readl_relaxed(clk_base + UTMIPLL_HW_PWRDN_CFG0);
clk_base         2807 drivers/clk/tegra/clk-tegra210.c 	writel_relaxed(reg, clk_base + UTMIPLL_HW_PWRDN_CFG0);
clk_base         2811 drivers/clk/tegra/clk-tegra210.c 	reg = readl_relaxed(clk_base + XUSB_PLL_CFG0);
clk_base         2813 drivers/clk/tegra/clk-tegra210.c 	writel_relaxed(reg, clk_base + XUSB_PLL_CFG0);
clk_base         2818 drivers/clk/tegra/clk-tegra210.c 	reg = readl_relaxed(clk_base + UTMIPLL_HW_PWRDN_CFG0);
clk_base         2820 drivers/clk/tegra/clk-tegra210.c 	writel_relaxed(reg, clk_base + UTMIPLL_HW_PWRDN_CFG0);
clk_base         2841 drivers/clk/tegra/clk-tegra210.c 	reg = readl_relaxed(clk_base + pllu.params->ext_misc_reg[0]);
clk_base         2843 drivers/clk/tegra/clk-tegra210.c 	writel_relaxed(reg, clk_base + pllu.params->ext_misc_reg[0]);
clk_base         2846 drivers/clk/tegra/clk-tegra210.c 	reg = readl_relaxed(clk_base + PLLU_BASE);
clk_base         2851 drivers/clk/tegra/clk-tegra210.c 	writel(reg, clk_base + PLLU_BASE);
clk_base         2854 drivers/clk/tegra/clk-tegra210.c 	writel(reg, clk_base + PLLU_BASE);
clk_base         2856 drivers/clk/tegra/clk-tegra210.c 	readl_relaxed_poll_timeout_atomic(clk_base + PLLU_BASE, reg,
clk_base         2873 drivers/clk/tegra/clk-tegra210.c 	reg = readl_relaxed(clk_base + PLLU_BASE);
clk_base         2883 drivers/clk/tegra/clk-tegra210.c 		reg = readl_relaxed(clk_base + PLLU_BASE);
clk_base         2885 drivers/clk/tegra/clk-tegra210.c 		writel(reg, clk_base + PLLU_BASE);
clk_base         2887 drivers/clk/tegra/clk-tegra210.c 		reg = readl_relaxed(clk_base + PLLU_HW_PWRDN_CFG0);
clk_base         2893 drivers/clk/tegra/clk-tegra210.c 		writel_relaxed(reg, clk_base + PLLU_HW_PWRDN_CFG0);
clk_base         2895 drivers/clk/tegra/clk-tegra210.c 		reg = readl_relaxed(clk_base + XUSB_PLL_CFG0);
clk_base         2897 drivers/clk/tegra/clk-tegra210.c 		writel_relaxed(reg, clk_base + XUSB_PLL_CFG0);
clk_base         2900 drivers/clk/tegra/clk-tegra210.c 		reg = readl_relaxed(clk_base + PLLU_HW_PWRDN_CFG0);
clk_base         2902 drivers/clk/tegra/clk-tegra210.c 		writel_relaxed(reg, clk_base + PLLU_HW_PWRDN_CFG0);
clk_base         2905 drivers/clk/tegra/clk-tegra210.c 		reg = readl_relaxed(clk_base + PLLU_BASE);
clk_base         2907 drivers/clk/tegra/clk-tegra210.c 		writel_relaxed(reg, clk_base + PLLU_BASE);
clk_base         2911 drivers/clk/tegra/clk-tegra210.c 	reg = readl_relaxed(clk_base + UTMIPLL_HW_PWRDN_CFG0);
clk_base         2949 drivers/clk/tegra/clk-tegra210.c static __init void tegra210_periph_clk_init(void __iomem *clk_base,
clk_base         2960 drivers/clk/tegra/clk-tegra210.c 	clk = tegra_clk_register_periph_fixed("sor_safe", "pll_p", 0, clk_base,
clk_base         2964 drivers/clk/tegra/clk-tegra210.c 	clk = tegra_clk_register_periph_fixed("dpaux", "sor_safe", 0, clk_base,
clk_base         2968 drivers/clk/tegra/clk-tegra210.c 	clk = tegra_clk_register_periph_fixed("dpaux1", "sor_safe", 0, clk_base,
clk_base         2974 drivers/clk/tegra/clk-tegra210.c 				     clk_base + CLK_SOURCE_SOR1, 14, 0x3,
clk_base         2980 drivers/clk/tegra/clk-tegra210.c 				clk_base + PLLD_MISC0, 21, 0, &pll_d_lock);
clk_base         2985 drivers/clk/tegra/clk-tegra210.c 					     clk_base, 0, 48,
clk_base         2991 drivers/clk/tegra/clk-tegra210.c 					     clk_base, 0, 82,
clk_base         2997 drivers/clk/tegra/clk-tegra210.c 			ARRAY_SIZE(la_parents), &tegra210_la, clk_base,
clk_base         3004 drivers/clk/tegra/clk-tegra210.c 			       clk_base + CLK_SOURCE_EMC,
clk_base         3007 drivers/clk/tegra/clk-tegra210.c 	clk = tegra_clk_register_mc("mc", "emc_mux", clk_base + CLK_SOURCE_EMC,
clk_base         3012 drivers/clk/tegra/clk-tegra210.c 	clk = clk_register_gate(NULL, "cml0", "pll_e", 0, clk_base + PLLE_AUX,
clk_base         3018 drivers/clk/tegra/clk-tegra210.c 	clk = clk_register_gate(NULL, "cml1", "pll_e", 0, clk_base + PLLE_AUX,
clk_base         3024 drivers/clk/tegra/clk-tegra210.c 				ARRAY_SIZE(aclk_parents), 0, clk_base + 0x6e0,
clk_base         3028 drivers/clk/tegra/clk-tegra210.c 	clk = tegra_clk_register_sdmmc_mux_div("sdmmc2", clk_base,
clk_base         3033 drivers/clk/tegra/clk-tegra210.c 	clk = tegra_clk_register_sdmmc_mux_div("sdmmc4", clk_base,
clk_base         3048 drivers/clk/tegra/clk-tegra210.c 		clk = tegra_clk_register_periph_data(clk_base, init);
clk_base         3052 drivers/clk/tegra/clk-tegra210.c 	tegra_periph_clk_init(clk_base, pmc_base, tegra210_clks, &pll_p_params);
clk_base         3055 drivers/clk/tegra/clk-tegra210.c static void __init tegra210_pll_init(void __iomem *clk_base,
clk_base         3061 drivers/clk/tegra/clk-tegra210.c 	clk = tegra_clk_register_pllc_tegra210("pll_c", "pll_ref", clk_base,
clk_base         3069 drivers/clk/tegra/clk-tegra210.c 			clk_base + PLLC_OUT, 0, TEGRA_DIVIDER_ROUND_UP,
clk_base         3072 drivers/clk/tegra/clk-tegra210.c 				clk_base + PLLC_OUT, 1, 0,
clk_base         3084 drivers/clk/tegra/clk-tegra210.c 	clk = tegra_clk_register_pllc_tegra210("pll_c2", "pll_ref", clk_base,
clk_base         3090 drivers/clk/tegra/clk-tegra210.c 	clk = tegra_clk_register_pllc_tegra210("pll_c3", "pll_ref", clk_base,
clk_base         3096 drivers/clk/tegra/clk-tegra210.c 	clk = tegra_clk_register_pllm("pll_m", "osc", clk_base, pmc,
clk_base         3102 drivers/clk/tegra/clk-tegra210.c 	clk = tegra_clk_register_pllmb("pll_mb", "osc", clk_base, pmc,
clk_base         3123 drivers/clk/tegra/clk-tegra210.c 					 clk_base + PLLU_BASE, 16, 4, 0,
clk_base         3130 drivers/clk/tegra/clk-tegra210.c 				clk_base + PLLU_OUTA, 0,
clk_base         3134 drivers/clk/tegra/clk-tegra210.c 				clk_base + PLLU_OUTA, 1, 0,
clk_base         3141 drivers/clk/tegra/clk-tegra210.c 				clk_base + PLLU_OUTA, 0,
clk_base         3145 drivers/clk/tegra/clk-tegra210.c 				clk_base + PLLU_OUTA, 17, 16,
clk_base         3152 drivers/clk/tegra/clk-tegra210.c 				CLK_SET_RATE_PARENT, clk_base + PLLU_BASE,
clk_base         3159 drivers/clk/tegra/clk-tegra210.c 				CLK_SET_RATE_PARENT, clk_base + PLLU_BASE,
clk_base         3166 drivers/clk/tegra/clk-tegra210.c 				CLK_SET_RATE_PARENT, clk_base + PLLU_BASE,
clk_base         3172 drivers/clk/tegra/clk-tegra210.c 	clk = tegra_clk_register_pll("pll_d", "pll_ref", clk_base, pmc, 0,
clk_base         3185 drivers/clk/tegra/clk-tegra210.c 						clk_base, pmc, 0,
clk_base         3192 drivers/clk/tegra/clk-tegra210.c 					 clk_base + PLLRE_BASE, 16, 5, 0,
clk_base         3198 drivers/clk/tegra/clk-tegra210.c 					 clk_base + PLLRE_OUT1, 0,
clk_base         3202 drivers/clk/tegra/clk-tegra210.c 					 clk_base + PLLRE_OUT1, 1, 0,
clk_base         3208 drivers/clk/tegra/clk-tegra210.c 				      clk_base, 0, &pll_e_params, NULL);
clk_base         3213 drivers/clk/tegra/clk-tegra210.c 	clk = tegra_clk_register_pllre("pll_c4_vco", "pll_ref", clk_base, pmc,
clk_base         3220 drivers/clk/tegra/clk-tegra210.c 					 clk_base + PLLC4_BASE, 19, 4, 0,
clk_base         3239 drivers/clk/tegra/clk-tegra210.c 			clk_base + PLLC4_OUT, 0, TEGRA_DIVIDER_ROUND_UP,
clk_base         3242 drivers/clk/tegra/clk-tegra210.c 				clk_base + PLLC4_OUT, 1, 0,
clk_base         3248 drivers/clk/tegra/clk-tegra210.c 	clk = tegra_clk_register_pllss_tegra210("pll_dp", "pll_ref", clk_base,
clk_base         3254 drivers/clk/tegra/clk-tegra210.c 	clk = tegra_clk_register_pllss_tegra210("pll_d2", "pll_ref", clk_base,
clk_base         3279 drivers/clk/tegra/clk-tegra210.c 		reg = readl(clk_base + CLK_RST_CONTROLLER_CPU_CMPLX_STATUS);
clk_base         3294 drivers/clk/tegra/clk-tegra210.c 				readl(clk_base + CLK_SOURCE_CSITE);
clk_base         3295 drivers/clk/tegra/clk-tegra210.c 	writel(3 << 30, clk_base + CLK_SOURCE_CSITE);
clk_base         3301 drivers/clk/tegra/clk-tegra210.c 				clk_base + CLK_SOURCE_CSITE);
clk_base         3400 drivers/clk/tegra/clk-tegra210.c 	readl_relaxed(clk_base + RST_DFLL_DVCO);
clk_base         3412 drivers/clk/tegra/clk-tegra210.c 	v = readl_relaxed(clk_base + RST_DFLL_DVCO);
clk_base         3414 drivers/clk/tegra/clk-tegra210.c 	writel_relaxed(v, clk_base + RST_DFLL_DVCO);
clk_base         3428 drivers/clk/tegra/clk-tegra210.c 	v = readl_relaxed(clk_base + RST_DFLL_DVCO);
clk_base         3430 drivers/clk/tegra/clk-tegra210.c 	writel_relaxed(v, clk_base + RST_DFLL_DVCO);
clk_base         3440 drivers/clk/tegra/clk-tegra210.c 			clk_base + CLK_RST_CONTROLLER_RST_DEV_Y_SET);
clk_base         3452 drivers/clk/tegra/clk-tegra210.c 		writel(BIT(21), clk_base + CLK_RST_CONTROLLER_RST_DEV_Y_CLR);
clk_base         3460 drivers/clk/tegra/clk-tegra210.c 			clk_base + CLK_RST_CONTROLLER_RST_DEV_Y_CLR);
clk_base         3512 drivers/clk/tegra/clk-tegra210.c 	clk_base = of_iomap(np, 0);
clk_base         3513 drivers/clk/tegra/clk-tegra210.c 	if (!clk_base) {
clk_base         3550 drivers/clk/tegra/clk-tegra210.c 	clks = tegra_clk_init(clk_base, TEGRA210_CLK_CLK_MAX,
clk_base         3555 drivers/clk/tegra/clk-tegra210.c 	value = readl(clk_base + SPARE_REG0) >> CLK_M_DIVISOR_SHIFT;
clk_base         3558 drivers/clk/tegra/clk-tegra210.c 	if (tegra_osc_clk_init(clk_base, tegra210_clks, tegra210_input_freq,
clk_base         3564 drivers/clk/tegra/clk-tegra210.c 	tegra210_pll_init(clk_base, pmc_base);
clk_base         3565 drivers/clk/tegra/clk-tegra210.c 	tegra210_periph_clk_init(clk_base, pmc_base);
clk_base         3566 drivers/clk/tegra/clk-tegra210.c 	tegra_audio_clk_init(clk_base, pmc_base, tegra210_clks,
clk_base         3572 drivers/clk/tegra/clk-tegra210.c 	value = readl(clk_base + PLLD_BASE);
clk_base         3574 drivers/clk/tegra/clk-tegra210.c 	writel(value, clk_base + PLLD_BASE);
clk_base         3578 drivers/clk/tegra/clk-tegra210.c 	tegra_super_clk_gen5_init(clk_base, pmc_base, tegra210_clks,
clk_base          148 drivers/clk/tegra/clk-tegra30.c static void __iomem *clk_base;
clk_base          821 drivers/clk/tegra/clk-tegra30.c 	clk = tegra_clk_register_pll("pll_c", "pll_ref", clk_base, pmc_base, 0,
clk_base          827 drivers/clk/tegra/clk-tegra30.c 				clk_base + PLLC_OUT, 0, TEGRA_DIVIDER_ROUND_UP,
clk_base          830 drivers/clk/tegra/clk-tegra30.c 				clk_base + PLLC_OUT, 1, 0, CLK_SET_RATE_PARENT,
clk_base          835 drivers/clk/tegra/clk-tegra30.c 	clk = tegra_clk_register_pll("pll_m", "pll_ref", clk_base, pmc_base,
clk_base          841 drivers/clk/tegra/clk-tegra30.c 				clk_base + PLLM_OUT, 0, TEGRA_DIVIDER_ROUND_UP,
clk_base          844 drivers/clk/tegra/clk-tegra30.c 				clk_base + PLLM_OUT, 1, 0,
clk_base          849 drivers/clk/tegra/clk-tegra30.c 	clk = tegra_clk_register_pll("pll_x", "pll_ref", clk_base, pmc_base, 0,
clk_base          859 drivers/clk/tegra/clk-tegra30.c 	clk = tegra_clk_register_pllu("pll_u", "pll_ref", clk_base, 0,
clk_base          864 drivers/clk/tegra/clk-tegra30.c 	clk = tegra_clk_register_pll("pll_d", "pll_ref", clk_base, pmc_base, 0,
clk_base          874 drivers/clk/tegra/clk-tegra30.c 	clk = tegra_clk_register_pll("pll_d2", "pll_ref", clk_base, pmc_base, 0,
clk_base          887 drivers/clk/tegra/clk-tegra30.c 			       clk_base + PLLE_AUX, 2, 1, 0, NULL);
clk_base          888 drivers/clk/tegra/clk-tegra30.c 	clk = tegra_clk_register_plle("pll_e", "pll_e_mux", clk_base, pmc_base,
clk_base          913 drivers/clk/tegra/clk-tegra30.c 				clk_base + SUPER_CCLKG_DIVIDER, 0,
clk_base          922 drivers/clk/tegra/clk-tegra30.c 				clk_base + SUPER_CCLKG_DIVIDER, 0,
clk_base          931 drivers/clk/tegra/clk-tegra30.c 				clk_base + SUPER_CCLKG_DIVIDER, 0,
clk_base          939 drivers/clk/tegra/clk-tegra30.c 				  clk_base + CCLKG_BURST_POLICY,
clk_base          948 drivers/clk/tegra/clk-tegra30.c 				clk_base + SUPER_CCLKLP_DIVIDER, 0,
clk_base          957 drivers/clk/tegra/clk-tegra30.c 				clk_base + SUPER_CCLKLP_DIVIDER, 0,
clk_base          966 drivers/clk/tegra/clk-tegra30.c 				clk_base + SUPER_CCLKLP_DIVIDER, 0,
clk_base          974 drivers/clk/tegra/clk-tegra30.c 				  clk_base + CCLKLP_BURST_POLICY,
clk_base          983 drivers/clk/tegra/clk-tegra30.c 				  clk_base + SCLK_BURST_POLICY,
clk_base          992 drivers/clk/tegra/clk-tegra30.c 	tegra_super_clk_gen4_init(clk_base, pmc_base, tegra30_clks, NULL);
clk_base         1032 drivers/clk/tegra/clk-tegra30.c 	clk = tegra_clk_register_periph_gate("dsia", "pll_d_out0", 0, clk_base,
clk_base         1037 drivers/clk/tegra/clk-tegra30.c 	clk = tegra_clk_register_periph_gate("pcie", "clk_m", 0, clk_base, 0,
clk_base         1042 drivers/clk/tegra/clk-tegra30.c 	clk = tegra_clk_register_periph_gate("afi", "clk_m", 0, clk_base, 0, 72,
clk_base         1050 drivers/clk/tegra/clk-tegra30.c 			       clk_base + CLK_SOURCE_EMC,
clk_base         1053 drivers/clk/tegra/clk-tegra30.c 	clk = tegra_clk_register_mc("mc", "emc_mux", clk_base + CLK_SOURCE_EMC,
clk_base         1058 drivers/clk/tegra/clk-tegra30.c 	clk = clk_register_gate(NULL, "cml0", "pll_e", 0, clk_base + PLLE_AUX,
clk_base         1063 drivers/clk/tegra/clk-tegra30.c 	clk = clk_register_gate(NULL, "cml1", "pll_e", 0, clk_base + PLLE_AUX,
clk_base         1069 drivers/clk/tegra/clk-tegra30.c 		clk = tegra_clk_register_periph_data(clk_base, data);
clk_base         1078 drivers/clk/tegra/clk-tegra30.c 					clk_base, data->offset);
clk_base         1082 drivers/clk/tegra/clk-tegra30.c 	tegra_periph_clk_init(clk_base, pmc_base, tegra30_clks, &pll_p_params);
clk_base         1091 drivers/clk/tegra/clk-tegra30.c 		reg = readl(clk_base +
clk_base         1102 drivers/clk/tegra/clk-tegra30.c 	       clk_base + TEGRA_CLK_RST_CONTROLLER_RST_CPU_CMPLX_SET);
clk_base         1109 drivers/clk/tegra/clk-tegra30.c 	       clk_base + TEGRA_CLK_RST_CONTROLLER_RST_CPU_CMPLX_CLR);
clk_base         1118 drivers/clk/tegra/clk-tegra30.c 	       clk_base + TEGRA30_CLK_RST_CONTROLLER_CLK_CPU_CMPLX_CLR);
clk_base         1119 drivers/clk/tegra/clk-tegra30.c 	reg = readl(clk_base +
clk_base         1127 drivers/clk/tegra/clk-tegra30.c 	reg = readl(clk_base + TEGRA_CLK_RST_CONTROLLER_CLK_CPU_CMPLX);
clk_base         1129 drivers/clk/tegra/clk-tegra30.c 	       clk_base + TEGRA_CLK_RST_CONTROLLER_CLK_CPU_CMPLX);
clk_base         1138 drivers/clk/tegra/clk-tegra30.c 	cpu_rst_status = readl(clk_base +
clk_base         1154 drivers/clk/tegra/clk-tegra30.c 				readl(clk_base + CLK_RESET_SOURCE_CSITE);
clk_base         1155 drivers/clk/tegra/clk-tegra30.c 	writel(3 << 30, clk_base + CLK_RESET_SOURCE_CSITE);
clk_base         1158 drivers/clk/tegra/clk-tegra30.c 				readl(clk_base + CLK_RESET_CCLK_BURST);
clk_base         1160 drivers/clk/tegra/clk-tegra30.c 				readl(clk_base + CLK_RESET_PLLX_BASE);
clk_base         1162 drivers/clk/tegra/clk-tegra30.c 				readl(clk_base + CLK_RESET_PLLX_MISC);
clk_base         1164 drivers/clk/tegra/clk-tegra30.c 				readl(clk_base + CLK_RESET_CCLK_DIVIDER);
clk_base         1172 drivers/clk/tegra/clk-tegra30.c 	reg = readl(clk_base + CLK_RESET_CCLK_BURST);
clk_base         1185 drivers/clk/tegra/clk-tegra30.c 					clk_base + CLK_RESET_PLLX_MISC);
clk_base         1187 drivers/clk/tegra/clk-tegra30.c 					clk_base + CLK_RESET_PLLX_BASE);
clk_base         1199 drivers/clk/tegra/clk-tegra30.c 					clk_base + CLK_RESET_CCLK_DIVIDER);
clk_base         1201 drivers/clk/tegra/clk-tegra30.c 					clk_base + CLK_RESET_CCLK_BURST);
clk_base         1204 drivers/clk/tegra/clk-tegra30.c 					clk_base + CLK_RESET_SOURCE_CSITE);
clk_base         1309 drivers/clk/tegra/clk-tegra30.c 	clk_base = of_iomap(np, 0);
clk_base         1310 drivers/clk/tegra/clk-tegra30.c 	if (!clk_base) {
clk_base         1327 drivers/clk/tegra/clk-tegra30.c 	clks = tegra_clk_init(clk_base, TEGRA30_CLK_CLK_MAX,
clk_base         1332 drivers/clk/tegra/clk-tegra30.c 	if (tegra_osc_clk_init(clk_base, tegra30_clks, tegra30_input_freq,
clk_base         1341 drivers/clk/tegra/clk-tegra30.c 	tegra_audio_clk_init(clk_base, pmc_base, tegra30_clks,
clk_base          137 drivers/clk/tegra/clk.c static void __iomem *clk_base;
clk_base          153 drivers/clk/tegra/clk.c 			       clk_base + periph_regs[id / 32].rst_set_reg);
clk_base          167 drivers/clk/tegra/clk.c 			       clk_base + periph_regs[id / 32].rst_clr_reg);
clk_base          204 drivers/clk/tegra/clk.c 	clk_base = regs;
clk_base          314 drivers/clk/tegra/clk.h 	void __iomem	*clk_base;
clk_base          340 drivers/clk/tegra/clk.h 		void __iomem *clk_base, void __iomem *pmc,
clk_base          345 drivers/clk/tegra/clk.h 		void __iomem *clk_base, void __iomem *pmc,
clk_base          350 drivers/clk/tegra/clk.h 			    void __iomem *clk_base, void __iomem *pmc,
clk_base          356 drivers/clk/tegra/clk.h 			   void __iomem *clk_base, void __iomem *pmc,
clk_base          362 drivers/clk/tegra/clk.h 			   void __iomem *clk_base, void __iomem *pmc,
clk_base          368 drivers/clk/tegra/clk.h 			   void __iomem *clk_base, void __iomem *pmc,
clk_base          374 drivers/clk/tegra/clk.h 			   const char *parent_name, void __iomem *clk_base,
clk_base          381 drivers/clk/tegra/clk.h 				void __iomem *clk_base, unsigned long flags,
clk_base          387 drivers/clk/tegra/clk.h 				void __iomem *clk_base, unsigned long flags,
clk_base          392 drivers/clk/tegra/clk.h 				const char *parent_name, void __iomem *clk_base,
clk_base          398 drivers/clk/tegra/clk.h 				const char *parent_name, void __iomem *clk_base,
clk_base          404 drivers/clk/tegra/clk.h 			   void __iomem *clk_base, unsigned long flags,
clk_base          409 drivers/clk/tegra/clk.h 			   void __iomem *clk_base, void __iomem *pmc,
clk_base          415 drivers/clk/tegra/clk.h 				void __iomem *clk_base, unsigned long flags,
clk_base          421 drivers/clk/tegra/clk.h 				void __iomem *clk_base, unsigned long flags,
clk_base          427 drivers/clk/tegra/clk.h 				void __iomem *clk_base, unsigned long flags,
clk_base          502 drivers/clk/tegra/clk.h 	void __iomem		*clk_base;
clk_base          523 drivers/clk/tegra/clk.h 		const char *parent_name, u8 gate_flags, void __iomem *clk_base,
clk_base          574 drivers/clk/tegra/clk.h 		struct tegra_clk_periph *periph, void __iomem *clk_base,
clk_base          578 drivers/clk/tegra/clk.h 		struct tegra_clk_periph *periph, void __iomem *clk_base,
clk_base          655 drivers/clk/tegra/clk.h struct clk *tegra_clk_register_periph_data(void __iomem *clk_base,
clk_base          721 drivers/clk/tegra/clk.h 		void __iomem *clk_base, u32 offset, u32 clk_num, u8 div_flags,
clk_base          778 drivers/clk/tegra/clk.h struct clk **tegra_clk_init(void __iomem *clk_base, int num, int periph_banks);
clk_base          785 drivers/clk/tegra/clk.h void tegra_audio_clk_init(void __iomem *clk_base,
clk_base          790 drivers/clk/tegra/clk.h void tegra_periph_clk_init(void __iomem *clk_base, void __iomem *pmc_base,
clk_base          796 drivers/clk/tegra/clk.h int tegra_osc_clk_init(void __iomem *clk_base, struct tegra_clk *clks,
clk_base          800 drivers/clk/tegra/clk.h void tegra_super_clk_gen4_init(void __iomem *clk_base,
clk_base          803 drivers/clk/tegra/clk.h void tegra_super_clk_gen5_init(void __iomem *clk_base,
clk_base           24 drivers/cpufreq/s5pv210-cpufreq.c static void __iomem *clk_base;
clk_base           27 drivers/cpufreq/s5pv210-cpufreq.c #define S5P_CLKREG(x)		(clk_base + (x))
clk_base          622 drivers/cpufreq/s5pv210-cpufreq.c 	clk_base = of_iomap(np, 0);
clk_base          624 drivers/cpufreq/s5pv210-cpufreq.c 	if (!clk_base) {
clk_base          670 drivers/cpufreq/s5pv210-cpufreq.c 	iounmap(clk_base);
clk_base          151 drivers/mmc/host/sdhci-of-at91.c 	unsigned int			clk_base, clk_mul;
clk_base          163 drivers/mmc/host/sdhci-of-at91.c 	clk_base = (caps0 & SDHCI_CLOCK_V3_BASE_MASK) >> SDHCI_CLOCK_BASE_SHIFT;
clk_base          165 drivers/mmc/host/sdhci-of-at91.c 	gck_rate = clk_base * 1000000 * (clk_mul + 1);
clk_base          180 drivers/mmc/host/sdhci-of-at91.c 		clk_mul = real_gck_rate / (clk_base * 1000000) - 1;
clk_base           45 drivers/pinctrl/samsung/pinctrl-exynos-arm.c 	void __iomem *clk_base = (void __iomem *)drvdata->retention_ctrl->priv;
clk_base           48 drivers/pinctrl/samsung/pinctrl-exynos-arm.c 	tmp = __raw_readl(clk_base + S5P_OTHERS);
clk_base           51 drivers/pinctrl/samsung/pinctrl-exynos-arm.c 	__raw_writel(tmp, clk_base + S5P_OTHERS);
clk_base           60 drivers/pinctrl/samsung/pinctrl-exynos-arm.c 	void __iomem *clk_base;
clk_base           73 drivers/pinctrl/samsung/pinctrl-exynos-arm.c 	clk_base = of_iomap(np, 0);
clk_base           75 drivers/pinctrl/samsung/pinctrl-exynos-arm.c 	if (!clk_base) {
clk_base           80 drivers/pinctrl/samsung/pinctrl-exynos-arm.c 	ctrl->priv = (void __force *)clk_base;