clk_Hz            157 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c 	u32 clk_Hz = mode->clock * 1000;
clk_Hz            164 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c 	ret = clk_set_rate(ctx->ade_pix_clk, clk_Hz);
clk_Hz            166 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c 		DRM_ERROR("failed to set pixel clk %dHz (%d)\n", clk_Hz, ret);