CWL                73 drivers/gpu/drm/nouveau/nvkm/subdev/fb/gddr3.c 	int CL, WR, CWL, DLL = 0, ODT = 0, RON, hi;
CWL                77 drivers/gpu/drm/nouveau/nvkm/subdev/fb/gddr3.c 		CWL = ram->next->bios.timing_10_CWL;
CWL                85 drivers/gpu/drm/nouveau/nvkm/subdev/fb/gddr3.c 		CWL = (ram->next->bios.timing[1] & 0x00000f80) >> 7;
CWL               104 drivers/gpu/drm/nouveau/nvkm/subdev/fb/gddr3.c 	if (CL < 0 || CWL < 1 || CWL > 7 || WR < 0)
CWL               108 drivers/gpu/drm/nouveau/nvkm/subdev/fb/gddr3.c 	ram->mr[0] |= (CWL & 0x07) << 9;
CWL               362 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgt215.c 	switch ((!T(CWL)) * ram->base.type) {
CWL               364 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgt215.c 		T(CWL) = T(CL) - 1;
CWL               367 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgt215.c 		T(CWL) = ((cur2 & 0xff000000) >> 24) + 1;
CWL               375 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgt215.c 	timing[1] = (T(WR) + 1 + T(CWL)) << 24 |
CWL               377 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgt215.c 		    (T(WTR) + 1 + T(CWL)) << 8 |
CWL               378 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgt215.c 		    (5 + T(CL) - T(CWL));
CWL               379 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgt215.c 	timing[2] = (T(CWL) - 1) << 24 |
CWL               393 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgt215.c 		    max_t(u8, (T(CWL) + 6), (T(CL) + 2)) << 8 |
CWL               396 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgt215.c 		    max_t(u8, 1, (6 - T(CL) + T(CWL))) << 8 |
CWL               397 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgt215.c 		    (0x50 + T(CL) - T(CWL));
CWL                86 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv50.c 	switch ((!T(CWL)) * ram->base.type) {
CWL                88 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv50.c 		T(CWL) = T(CL) - 1;
CWL                91 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv50.c 		T(CWL) = ((cur2 & 0xff000000) >> 24) + 1;
CWL                98 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv50.c 		timing[6] = (0x2d + T(CL) - T(CWL) +
CWL               100 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv50.c 			    T(CWL) << 8 |
CWL               101 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv50.c 			    (0x2f + T(CL) - T(CWL));
CWL               104 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv50.c 		timing[6] = (0x2b + T(CL) - T(CWL)) << 16 |
CWL               105 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv50.c 			    max_t(s8, T(CWL) - 2, 1) << 8 |
CWL               106 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv50.c 			    (0x2e + T(CL) - T(CWL));
CWL               110 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv50.c 	timing[1] = (T(WR) + 1 + T(CWL)) << 24 |
CWL               112 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv50.c 		    (T(WTR) + 1 + T(CWL)) << 8 |
CWL               113 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv50.c 		    (3 + T(CL) - T(CWL));
CWL               114 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv50.c 	timing[2] = (T(CWL) - 1) << 24 |
CWL               167 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv50.c 		T(CWL) = T(CL) - 1;
CWL               170 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv50.c 		T(CWL) = ((timing[2] & 0xff000000) >> 24) + 1;
CWL               177 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv50.c 	T(WR) = ((timing[1] >> 24) & 0xff) - 1 - T(CWL);
CWL                72 drivers/gpu/drm/nouveau/nvkm/subdev/fb/sddr3.c 	int CWL, CL, WR, DLL = 0, ODT = 0;
CWL                82 drivers/gpu/drm/nouveau/nvkm/subdev/fb/sddr3.c 		CWL = ram->next->bios.timing_10_CWL;
CWL                88 drivers/gpu/drm/nouveau/nvkm/subdev/fb/sddr3.c 		CWL = (ram->next->bios.timing[1] & 0x00000f80) >> 7;
CWL               100 drivers/gpu/drm/nouveau/nvkm/subdev/fb/sddr3.c 	CWL = ramxlat(ramddr3_cwl, CWL);
CWL               103 drivers/gpu/drm/nouveau/nvkm/subdev/fb/sddr3.c 	if (CL < 0 || CWL < 0 || WR < 0)
CWL               118 drivers/gpu/drm/nouveau/nvkm/subdev/fb/sddr3.c 	ram->mr[2] |= (CWL & 0x07) << 3;