CUR_UPDATE       2276 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c 		cur_lock = REG_SET_FIELD(cur_lock, CUR_UPDATE, CURSOR_UPDATE_LOCK, 1);
CUR_UPDATE       2278 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c 		cur_lock = REG_SET_FIELD(cur_lock, CUR_UPDATE, CURSOR_UPDATE_LOCK, 0);
CUR_UPDATE       2355 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c 		cur_lock = REG_SET_FIELD(cur_lock, CUR_UPDATE, CURSOR_UPDATE_LOCK, 1);
CUR_UPDATE       2357 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c 		cur_lock = REG_SET_FIELD(cur_lock, CUR_UPDATE, CURSOR_UPDATE_LOCK, 0);
CUR_UPDATE         51 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.c 	REG_UPDATE(CUR_UPDATE, CURSOR_UPDATE_LOCK, true);
CUR_UPDATE         66 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.c 	REG_UPDATE(CUR_UPDATE, CURSOR_UPDATE_LOCK, false);
CUR_UPDATE         77 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.c 	REG_UPDATE(CUR_UPDATE, CURSOR_UPDATE_LOCK, true);
CUR_UPDATE        136 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.c 	REG_UPDATE(CUR_UPDATE, CURSOR_UPDATE_LOCK, false);
CUR_UPDATE         35 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h 	SRI(CUR_UPDATE, DCP, id), \
CUR_UPDATE         68 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h 	IPP_SF(CUR_UPDATE, CURSOR_UPDATE_LOCK, mask_sh), \
CUR_UPDATE        199 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h 	uint32_t CUR_UPDATE;