clear_state_gpu_addr  136 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c 				      &adev->gfx.rlc.clear_state_gpu_addr,
clear_state_gpu_addr  275 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c 			      &adev->gfx.rlc.clear_state_gpu_addr,
clear_state_gpu_addr  140 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.h 	uint64_t                clear_state_gpu_addr;
clear_state_gpu_addr  968 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c 			&adev->gfx.rlc.clear_state_gpu_addr,
clear_state_gpu_addr 1007 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c 		adev->gfx.rlc.clear_state_gpu_addr =
clear_state_gpu_addr 1812 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c 		     adev->gfx.rlc.clear_state_gpu_addr >> 32);
clear_state_gpu_addr 1814 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c 		     adev->gfx.rlc.clear_state_gpu_addr & 0xfffffffc);
clear_state_gpu_addr 2408 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c 					      &adev->gfx.rlc.clear_state_gpu_addr,
clear_state_gpu_addr 2418 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c 		reg_list_mc_addr = adev->gfx.rlc.clear_state_gpu_addr + 256;
clear_state_gpu_addr 2830 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c 	WREG32(mmRLC_CLEAR_STATE_RESTORE_BASE, adev->gfx.rlc.clear_state_gpu_addr >> 8);
clear_state_gpu_addr 2937 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c 			WREG32(mmRLC_CLEAR_STATE_RESTORE_BASE, adev->gfx.rlc.clear_state_gpu_addr >> 8);
clear_state_gpu_addr 2945 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c 		WREG32(mmRLC_CLEAR_STATE_RESTORE_BASE, adev->gfx.rlc.clear_state_gpu_addr >> 8);
clear_state_gpu_addr 3887 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c 		WREG32(mmRLC_GPM_SCRATCH_DATA, upper_32_bits(adev->gfx.rlc.clear_state_gpu_addr));
clear_state_gpu_addr 3888 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c 		WREG32(mmRLC_GPM_SCRATCH_DATA, lower_32_bits(adev->gfx.rlc.clear_state_gpu_addr));
clear_state_gpu_addr 4538 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c 				&adev->gfx.rlc.clear_state_gpu_addr,
clear_state_gpu_addr 1335 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 		adev->gfx.rlc.clear_state_gpu_addr =
clear_state_gpu_addr 2112 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 				&adev->gfx.rlc.clear_state_gpu_addr,
clear_state_gpu_addr 3922 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 			adev->gfx.rlc.clear_state_gpu_addr >> 32);
clear_state_gpu_addr 3924 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 			adev->gfx.rlc.clear_state_gpu_addr & 0xfffffffc);
clear_state_gpu_addr 1689 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c 		adev->gfx.rlc.clear_state_gpu_addr =
clear_state_gpu_addr 2601 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c 			adev->gfx.rlc.clear_state_gpu_addr >> 32);
clear_state_gpu_addr 2603 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c 			adev->gfx.rlc.clear_state_gpu_addr & 0xfffffffc);
clear_state_gpu_addr 6633 drivers/gpu/drm/radeon/cik.c 		WREG32(RLC_GPM_SCRATCH_DATA, upper_32_bits(rdev->rlc.clear_state_gpu_addr));
clear_state_gpu_addr 6634 drivers/gpu/drm/radeon/cik.c 		WREG32(RLC_GPM_SCRATCH_DATA, lower_32_bits(rdev->rlc.clear_state_gpu_addr));
clear_state_gpu_addr 4267 drivers/gpu/drm/radeon/evergreen.c 				  &rdev->rlc.clear_state_gpu_addr);
clear_state_gpu_addr 4286 drivers/gpu/drm/radeon/evergreen.c 			reg_list_mc_addr = rdev->rlc.clear_state_gpu_addr + 256;
clear_state_gpu_addr 4293 drivers/gpu/drm/radeon/evergreen.c 			reg_list_mc_addr = rdev->rlc.clear_state_gpu_addr + (reg_list_blk_index * 4);
clear_state_gpu_addr 4413 drivers/gpu/drm/radeon/evergreen.c 		WREG32(TN_RLC_CLEAR_STATE_RESTORE_BASE, rdev->rlc.clear_state_gpu_addr >> 8);
clear_state_gpu_addr  994 drivers/gpu/drm/radeon/radeon.h 	uint64_t		clear_state_gpu_addr;
clear_state_gpu_addr 5289 drivers/gpu/drm/radeon/si.c 	WREG32(RLC_CLEAR_STATE_RESTORE_BASE, rdev->rlc.clear_state_gpu_addr >> 8);
clear_state_gpu_addr 5786 drivers/gpu/drm/radeon/si.c 			WREG32(RLC_CLEAR_STATE_RESTORE_BASE, rdev->rlc.clear_state_gpu_addr >> 8);
clear_state_gpu_addr 5792 drivers/gpu/drm/radeon/si.c 		WREG32(RLC_CLEAR_STATE_RESTORE_BASE, rdev->rlc.clear_state_gpu_addr >> 8);