cle 152 arch/arm/mach-orion5x/db88f5281-setup.c .cle = 0, cle 78 arch/arm/mach-orion5x/kurobox_pro-setup.c .cle = 0, cle 194 arch/mips/include/asm/octeon/cvmx-pci-defs.h uint32_t cle:1; cle 222 arch/mips/include/asm/octeon/cvmx-pci-defs.h uint32_t cle:1; cle 1500 drivers/ide/ide-cd.c const struct cd_list_entry *cle = ide_cd_quirks_list; cle 1502 drivers/ide/ide-cd.c while (cle->id_model) { cle 1503 drivers/ide/ide-cd.c if (strcmp(cle->id_model, (char *)&id[ATA_ID_PROD]) == 0 && cle 1504 drivers/ide/ide-cd.c (cle->id_firmware == NULL || cle 1505 drivers/ide/ide-cd.c strstr((char *)&id[ATA_ID_FW_REV], cle->id_firmware))) cle 1506 drivers/ide/ide-cd.c return cle->cd_flags; cle 1507 drivers/ide/ide-cd.c cle++; cle 34 drivers/mtd/nand/raw/gpio.c struct gpio_desc *cle; cle 82 drivers/mtd/nand/raw/gpio.c gpiod_set_value(gpiomtd->cle, !!(ctrl & NAND_CLE)); cle 257 drivers/mtd/nand/raw/gpio.c gpiomtd->cle = devm_gpiod_get(dev, "cle", GPIOD_OUT_LOW); cle 258 drivers/mtd/nand/raw/gpio.c if (IS_ERR(gpiomtd->cle)) { cle 259 drivers/mtd/nand/raw/gpio.c ret = PTR_ERR(gpiomtd->cle); cle 345 drivers/mtd/nand/raw/nandsim.c int cle; /* command Latch Enable */ cle 1860 drivers/mtd/nand/raw/nandsim.c if (ns->lines.ale || ns->lines.cle) { cle 1920 drivers/mtd/nand/raw/nandsim.c if (ns->lines.ale && ns->lines.cle) { cle 1925 drivers/mtd/nand/raw/nandsim.c if (ns->lines.cle == 1) { cle 2102 drivers/mtd/nand/raw/nandsim.c if (ns->lines.ale || ns->lines.cle) { cle 2151 drivers/mtd/nand/raw/nandsim.c ns->lines.cle = 0; cle 2156 drivers/mtd/nand/raw/nandsim.c ns->lines.cle = 1; cle 39 drivers/mtd/nand/raw/orion_nand.c offs = (1 << board->cle); cle 116 drivers/mtd/nand/raw/orion_nand.c board->cle = (u8)val; cle 118 drivers/mtd/nand/raw/orion_nand.c board->cle = 0; cle 123 drivers/net/ethernet/apm/xgene/xgene_enet_cle.c static int xgene_cle_dram_wr(struct xgene_enet_cle *cle, u32 *data, u8 nregs, cle 127 drivers/net/ethernet/apm/xgene/xgene_enet_cle.c enum xgene_cle_parser parser = cle->active_parser; cle 128 drivers/net/ethernet/apm/xgene/xgene_enet_cle.c void __iomem *base = cle->base; cle 134 drivers/net/ethernet/apm/xgene/xgene_enet_cle.c nparsers = (type >= PTREE_RAM) ? 1 : cle->parsers; cle 156 drivers/net/ethernet/apm/xgene/xgene_enet_cle.c struct xgene_enet_cle *cle) cle 158 drivers/net/ethernet/apm/xgene/xgene_enet_cle.c struct xgene_cle_ptree *ptree = &cle->ptree; cle 159 drivers/net/ethernet/apm/xgene/xgene_enet_cle.c void __iomem *addr, *base = cle->base; cle 164 drivers/net/ethernet/apm/xgene/xgene_enet_cle.c ptree->start_pkt += cle->jump_bytes; cle 165 drivers/net/ethernet/apm/xgene/xgene_enet_cle.c for (i = 0; i < cle->parsers; i++) { cle 166 drivers/net/ethernet/apm/xgene/xgene_enet_cle.c if (cle->active_parser != PARSER_ALL) cle 167 drivers/net/ethernet/apm/xgene/xgene_enet_cle.c addr = base + cle->active_parser * offset; cle 177 drivers/net/ethernet/apm/xgene/xgene_enet_cle.c struct xgene_enet_cle *cle) cle 179 drivers/net/ethernet/apm/xgene/xgene_enet_cle.c struct xgene_cle_ptree *ptree = &cle->ptree; cle 187 drivers/net/ethernet/apm/xgene/xgene_enet_cle.c ret = xgene_cle_dram_wr(cle, buf, 6, i + ptree->start_dbptr, cle 564 drivers/net/ethernet/apm/xgene/xgene_enet_cle.c struct xgene_enet_cle *cle) cle 566 drivers/net/ethernet/apm/xgene/xgene_enet_cle.c struct xgene_cle_ptree *ptree = &cle->ptree; cle 575 drivers/net/ethernet/apm/xgene/xgene_enet_cle.c xgene_cle_dn_to_hw(&dn[i], buf, cle->jump_bytes); cle 576 drivers/net/ethernet/apm/xgene/xgene_enet_cle.c ret = xgene_cle_dram_wr(cle, buf, 17, i + ptree->start_node, cle 586 drivers/net/ethernet/apm/xgene/xgene_enet_cle.c ret = xgene_cle_dram_wr(cle, buf, 17, j + ptree->start_node, cle 596 drivers/net/ethernet/apm/xgene/xgene_enet_cle.c struct xgene_enet_cle *cle) cle 600 drivers/net/ethernet/apm/xgene/xgene_enet_cle.c ret = xgene_cle_setup_node(pdata, cle); cle 604 drivers/net/ethernet/apm/xgene/xgene_enet_cle.c ret = xgene_cle_setup_dbptr(pdata, cle); cle 608 drivers/net/ethernet/apm/xgene/xgene_enet_cle.c xgene_cle_enable_ptree(pdata, cle); cle 644 drivers/net/ethernet/apm/xgene/xgene_enet_cle.c static int xgene_cle_set_rss_sband(struct xgene_enet_cle *cle) cle 663 drivers/net/ethernet/apm/xgene/xgene_enet_cle.c ret = xgene_cle_dram_wr(cle, &sband, 1, idx, PKT_RAM, CLE_CMD_WR); cle 679 drivers/net/ethernet/apm/xgene/xgene_enet_cle.c ret = xgene_cle_dram_wr(cle, &sband, 1, idx + 1, PKT_RAM, CLE_CMD_WR); cle 686 drivers/net/ethernet/apm/xgene/xgene_enet_cle.c static int xgene_cle_set_rss_skeys(struct xgene_enet_cle *cle) cle 692 drivers/net/ethernet/apm/xgene/xgene_enet_cle.c ret = xgene_cle_dram_wr(cle, secret_key_ipv4, 4, 0, cle 716 drivers/net/ethernet/apm/xgene/xgene_enet_cle.c ret = xgene_cle_dram_wr(&pdata->cle, &idt_reg, 1, i, cle 722 drivers/net/ethernet/apm/xgene/xgene_enet_cle.c ret = xgene_cle_set_rss_skeys(&pdata->cle); cle 731 drivers/net/ethernet/apm/xgene/xgene_enet_cle.c struct xgene_enet_cle *cle = &pdata->cle; cle 732 drivers/net/ethernet/apm/xgene/xgene_enet_cle.c void __iomem *base = cle->base; cle 737 drivers/net/ethernet/apm/xgene/xgene_enet_cle.c for (i = 0; i < cle->parsers; i++) { cle 738 drivers/net/ethernet/apm/xgene/xgene_enet_cle.c if (cle->active_parser != PARSER_ALL) cle 739 drivers/net/ethernet/apm/xgene/xgene_enet_cle.c offset = cle->active_parser * CLE_PORT_OFFSET; cle 749 drivers/net/ethernet/apm/xgene/xgene_enet_cle.c ret = xgene_cle_set_rss_sband(cle); cle 763 drivers/net/ethernet/apm/xgene/xgene_enet_cle.c struct xgene_enet_cle *enet_cle = &pdata->cle; cle 1784 drivers/net/ethernet/apm/xgene/xgene_enet_main.c pdata->cle.base = base_addr + BLOCK_ETH_CLE_CSR_OFFSET; cle 1809 drivers/net/ethernet/apm/xgene/xgene_enet_main.c struct xgene_enet_cle *enet_cle = &pdata->cle; cle 214 drivers/net/ethernet/apm/xgene/xgene_enet_main.h struct xgene_enet_cle cle; cle 17 include/linux/platform_data/mtd-orion_nand.h u8 cle; /* address line number connected to CLE */