ABM               484 arch/x86/kvm/cpuid.c 		F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
ABM                58 drivers/gpu/drm/amd/display/dc/dce/dce_abm.h 	SRI(DC_ABM1_HG_SAMPLE_RATE, ABM, id), \
ABM                59 drivers/gpu/drm/amd/display/dc/dce/dce_abm.h 	SRI(DC_ABM1_LS_SAMPLE_RATE, ABM, id), \
ABM                60 drivers/gpu/drm/amd/display/dc/dce/dce_abm.h 	SRI(BL1_PWM_BL_UPDATE_SAMPLE_RATE, ABM, id), \
ABM                61 drivers/gpu/drm/amd/display/dc/dce/dce_abm.h 	SRI(DC_ABM1_HG_MISC_CTRL, ABM, id), \
ABM                62 drivers/gpu/drm/amd/display/dc/dce/dce_abm.h 	SRI(DC_ABM1_IPCSC_COEFF_SEL, ABM, id), \
ABM                63 drivers/gpu/drm/amd/display/dc/dce/dce_abm.h 	SRI(BL1_PWM_CURRENT_ABM_LEVEL, ABM, id), \
ABM                64 drivers/gpu/drm/amd/display/dc/dce/dce_abm.h 	SRI(BL1_PWM_TARGET_ABM_LEVEL, ABM, id), \
ABM                65 drivers/gpu/drm/amd/display/dc/dce/dce_abm.h 	SRI(BL1_PWM_USER_LEVEL, ABM, id), \
ABM                66 drivers/gpu/drm/amd/display/dc/dce/dce_abm.h 	SRI(DC_ABM1_LS_MIN_MAX_PIXEL_VALUE_THRES, ABM, id), \
ABM                67 drivers/gpu/drm/amd/display/dc/dce/dce_abm.h 	SRI(DC_ABM1_HGLS_REG_READ_PROGRESS, ABM, id), \