cik              1301 drivers/gpu/drm/radeon/atombios_crtc.c 				num_banks = (rdev->config.cik.macrotile_mode_array[index] >> 6) & 0x3;
cik              1357 drivers/gpu/drm/radeon/atombios_crtc.c 		u32 pipe_config = (rdev->config.cik.tile_mode_array[10] >> 6) & 0x1f;
cik              2335 drivers/gpu/drm/radeon/cik.c 	u32 *tile = rdev->config.cik.tile_mode_array;
cik              2336 drivers/gpu/drm/radeon/cik.c 	u32 *macrotile = rdev->config.cik.macrotile_mode_array;
cik              2338 drivers/gpu/drm/radeon/cik.c 			ARRAY_SIZE(rdev->config.cik.tile_mode_array);
cik              2340 drivers/gpu/drm/radeon/cik.c 			ARRAY_SIZE(rdev->config.cik.macrotile_mode_array);
cik              2343 drivers/gpu/drm/radeon/cik.c 	u32 num_rbs = rdev->config.cik.max_backends_per_se *
cik              2344 drivers/gpu/drm/radeon/cik.c 		rdev->config.cik.max_shader_engines;
cik              2346 drivers/gpu/drm/radeon/cik.c 	switch (rdev->config.cik.mem_row_size_in_kb) {
cik              2359 drivers/gpu/drm/radeon/cik.c 	num_pipe_configs = rdev->config.cik.max_tile_pipes;
cik              3143 drivers/gpu/drm/radeon/cik.c 	rdev->config.cik.backend_enable_mask = enabled_rbs;
cik              3192 drivers/gpu/drm/radeon/cik.c 		rdev->config.cik.max_shader_engines = 2;
cik              3193 drivers/gpu/drm/radeon/cik.c 		rdev->config.cik.max_tile_pipes = 4;
cik              3194 drivers/gpu/drm/radeon/cik.c 		rdev->config.cik.max_cu_per_sh = 7;
cik              3195 drivers/gpu/drm/radeon/cik.c 		rdev->config.cik.max_sh_per_se = 1;
cik              3196 drivers/gpu/drm/radeon/cik.c 		rdev->config.cik.max_backends_per_se = 2;
cik              3197 drivers/gpu/drm/radeon/cik.c 		rdev->config.cik.max_texture_channel_caches = 4;
cik              3198 drivers/gpu/drm/radeon/cik.c 		rdev->config.cik.max_gprs = 256;
cik              3199 drivers/gpu/drm/radeon/cik.c 		rdev->config.cik.max_gs_threads = 32;
cik              3200 drivers/gpu/drm/radeon/cik.c 		rdev->config.cik.max_hw_contexts = 8;
cik              3202 drivers/gpu/drm/radeon/cik.c 		rdev->config.cik.sc_prim_fifo_size_frontend = 0x20;
cik              3203 drivers/gpu/drm/radeon/cik.c 		rdev->config.cik.sc_prim_fifo_size_backend = 0x100;
cik              3204 drivers/gpu/drm/radeon/cik.c 		rdev->config.cik.sc_hiz_tile_fifo_size = 0x30;
cik              3205 drivers/gpu/drm/radeon/cik.c 		rdev->config.cik.sc_earlyz_tile_fifo_size = 0x130;
cik              3209 drivers/gpu/drm/radeon/cik.c 		rdev->config.cik.max_shader_engines = 4;
cik              3210 drivers/gpu/drm/radeon/cik.c 		rdev->config.cik.max_tile_pipes = 16;
cik              3211 drivers/gpu/drm/radeon/cik.c 		rdev->config.cik.max_cu_per_sh = 11;
cik              3212 drivers/gpu/drm/radeon/cik.c 		rdev->config.cik.max_sh_per_se = 1;
cik              3213 drivers/gpu/drm/radeon/cik.c 		rdev->config.cik.max_backends_per_se = 4;
cik              3214 drivers/gpu/drm/radeon/cik.c 		rdev->config.cik.max_texture_channel_caches = 16;
cik              3215 drivers/gpu/drm/radeon/cik.c 		rdev->config.cik.max_gprs = 256;
cik              3216 drivers/gpu/drm/radeon/cik.c 		rdev->config.cik.max_gs_threads = 32;
cik              3217 drivers/gpu/drm/radeon/cik.c 		rdev->config.cik.max_hw_contexts = 8;
cik              3219 drivers/gpu/drm/radeon/cik.c 		rdev->config.cik.sc_prim_fifo_size_frontend = 0x20;
cik              3220 drivers/gpu/drm/radeon/cik.c 		rdev->config.cik.sc_prim_fifo_size_backend = 0x100;
cik              3221 drivers/gpu/drm/radeon/cik.c 		rdev->config.cik.sc_hiz_tile_fifo_size = 0x30;
cik              3222 drivers/gpu/drm/radeon/cik.c 		rdev->config.cik.sc_earlyz_tile_fifo_size = 0x130;
cik              3226 drivers/gpu/drm/radeon/cik.c 		rdev->config.cik.max_shader_engines = 1;
cik              3227 drivers/gpu/drm/radeon/cik.c 		rdev->config.cik.max_tile_pipes = 4;
cik              3228 drivers/gpu/drm/radeon/cik.c 		rdev->config.cik.max_cu_per_sh = 8;
cik              3229 drivers/gpu/drm/radeon/cik.c 		rdev->config.cik.max_backends_per_se = 2;
cik              3230 drivers/gpu/drm/radeon/cik.c 		rdev->config.cik.max_sh_per_se = 1;
cik              3231 drivers/gpu/drm/radeon/cik.c 		rdev->config.cik.max_texture_channel_caches = 4;
cik              3232 drivers/gpu/drm/radeon/cik.c 		rdev->config.cik.max_gprs = 256;
cik              3233 drivers/gpu/drm/radeon/cik.c 		rdev->config.cik.max_gs_threads = 16;
cik              3234 drivers/gpu/drm/radeon/cik.c 		rdev->config.cik.max_hw_contexts = 8;
cik              3236 drivers/gpu/drm/radeon/cik.c 		rdev->config.cik.sc_prim_fifo_size_frontend = 0x20;
cik              3237 drivers/gpu/drm/radeon/cik.c 		rdev->config.cik.sc_prim_fifo_size_backend = 0x100;
cik              3238 drivers/gpu/drm/radeon/cik.c 		rdev->config.cik.sc_hiz_tile_fifo_size = 0x30;
cik              3239 drivers/gpu/drm/radeon/cik.c 		rdev->config.cik.sc_earlyz_tile_fifo_size = 0x130;
cik              3245 drivers/gpu/drm/radeon/cik.c 		rdev->config.cik.max_shader_engines = 1;
cik              3246 drivers/gpu/drm/radeon/cik.c 		rdev->config.cik.max_tile_pipes = 2;
cik              3247 drivers/gpu/drm/radeon/cik.c 		rdev->config.cik.max_cu_per_sh = 2;
cik              3248 drivers/gpu/drm/radeon/cik.c 		rdev->config.cik.max_sh_per_se = 1;
cik              3249 drivers/gpu/drm/radeon/cik.c 		rdev->config.cik.max_backends_per_se = 1;
cik              3250 drivers/gpu/drm/radeon/cik.c 		rdev->config.cik.max_texture_channel_caches = 2;
cik              3251 drivers/gpu/drm/radeon/cik.c 		rdev->config.cik.max_gprs = 256;
cik              3252 drivers/gpu/drm/radeon/cik.c 		rdev->config.cik.max_gs_threads = 16;
cik              3253 drivers/gpu/drm/radeon/cik.c 		rdev->config.cik.max_hw_contexts = 8;
cik              3255 drivers/gpu/drm/radeon/cik.c 		rdev->config.cik.sc_prim_fifo_size_frontend = 0x20;
cik              3256 drivers/gpu/drm/radeon/cik.c 		rdev->config.cik.sc_prim_fifo_size_backend = 0x100;
cik              3257 drivers/gpu/drm/radeon/cik.c 		rdev->config.cik.sc_hiz_tile_fifo_size = 0x30;
cik              3258 drivers/gpu/drm/radeon/cik.c 		rdev->config.cik.sc_earlyz_tile_fifo_size = 0x130;
cik              3281 drivers/gpu/drm/radeon/cik.c 	rdev->config.cik.num_tile_pipes = rdev->config.cik.max_tile_pipes;
cik              3282 drivers/gpu/drm/radeon/cik.c 	rdev->config.cik.mem_max_burst_length_bytes = 256;
cik              3284 drivers/gpu/drm/radeon/cik.c 	rdev->config.cik.mem_row_size_in_kb = (4 * (1 << (8 + tmp))) / 1024;
cik              3285 drivers/gpu/drm/radeon/cik.c 	if (rdev->config.cik.mem_row_size_in_kb > 4)
cik              3286 drivers/gpu/drm/radeon/cik.c 		rdev->config.cik.mem_row_size_in_kb = 4;
cik              3288 drivers/gpu/drm/radeon/cik.c 	rdev->config.cik.shader_engine_tile_size = 32;
cik              3289 drivers/gpu/drm/radeon/cik.c 	rdev->config.cik.num_gpus = 1;
cik              3290 drivers/gpu/drm/radeon/cik.c 	rdev->config.cik.multi_gpu_tile_size = 64;
cik              3294 drivers/gpu/drm/radeon/cik.c 	switch (rdev->config.cik.mem_row_size_in_kb) {
cik              3314 drivers/gpu/drm/radeon/cik.c 	rdev->config.cik.tile_config = 0;
cik              3315 drivers/gpu/drm/radeon/cik.c 	switch (rdev->config.cik.num_tile_pipes) {
cik              3317 drivers/gpu/drm/radeon/cik.c 		rdev->config.cik.tile_config |= (0 << 0);
cik              3320 drivers/gpu/drm/radeon/cik.c 		rdev->config.cik.tile_config |= (1 << 0);
cik              3323 drivers/gpu/drm/radeon/cik.c 		rdev->config.cik.tile_config |= (2 << 0);
cik              3328 drivers/gpu/drm/radeon/cik.c 		rdev->config.cik.tile_config |= (3 << 0);
cik              3331 drivers/gpu/drm/radeon/cik.c 	rdev->config.cik.tile_config |=
cik              3333 drivers/gpu/drm/radeon/cik.c 	rdev->config.cik.tile_config |=
cik              3335 drivers/gpu/drm/radeon/cik.c 	rdev->config.cik.tile_config |=
cik              3349 drivers/gpu/drm/radeon/cik.c 	cik_setup_rb(rdev, rdev->config.cik.max_shader_engines,
cik              3350 drivers/gpu/drm/radeon/cik.c 		     rdev->config.cik.max_sh_per_se,
cik              3351 drivers/gpu/drm/radeon/cik.c 		     rdev->config.cik.max_backends_per_se);
cik              3353 drivers/gpu/drm/radeon/cik.c 	rdev->config.cik.active_cus = 0;
cik              3354 drivers/gpu/drm/radeon/cik.c 	for (i = 0; i < rdev->config.cik.max_shader_engines; i++) {
cik              3355 drivers/gpu/drm/radeon/cik.c 		for (j = 0; j < rdev->config.cik.max_sh_per_se; j++) {
cik              3356 drivers/gpu/drm/radeon/cik.c 			rdev->config.cik.active_cus +=
cik              3390 drivers/gpu/drm/radeon/cik.c 	WREG32(PA_SC_FIFO_SIZE, (SC_FRONTEND_PRIM_FIFO_SIZE(rdev->config.cik.sc_prim_fifo_size_frontend) |
cik              3391 drivers/gpu/drm/radeon/cik.c 				 SC_BACKEND_PRIM_FIFO_SIZE(rdev->config.cik.sc_prim_fifo_size_backend) |
cik              3392 drivers/gpu/drm/radeon/cik.c 				 SC_HIZ_TILE_FIFO_SIZE(rdev->config.cik.sc_hiz_tile_fifo_size) |
cik              3393 drivers/gpu/drm/radeon/cik.c 				 SC_EARLYZ_TILE_FIFO_SIZE(rdev->config.cik.sc_earlyz_tile_fifo_size)));
cik              3991 drivers/gpu/drm/radeon/cik.c 	WREG32(CP_MAX_CONTEXT, rdev->config.cik.max_hw_contexts - 1);
cik              5801 drivers/gpu/drm/radeon/cik.c 	for (i = 0; i < rdev->config.cik.max_shader_engines; i++) {
cik              5802 drivers/gpu/drm/radeon/cik.c 		for (j = 0; j < rdev->config.cik.max_sh_per_se; j++) {
cik              6554 drivers/gpu/drm/radeon/cik.c 	for (i = 0; i < rdev->config.cik.max_cu_per_sh; i ++) {
cik              6568 drivers/gpu/drm/radeon/cik.c 	for (i = 0; i < rdev->config.cik.max_shader_engines; i++) {
cik              6569 drivers/gpu/drm/radeon/cik.c 		for (j = 0; j < rdev->config.cik.max_sh_per_se; j++) {
cik              6573 drivers/gpu/drm/radeon/cik.c 			for (k = 0; k < rdev->config.cik.max_cu_per_sh; k ++) {
cik              7304 drivers/gpu/drm/radeon/cik.c 	rdev->irq.stat_regs.cik.disp_int = RREG32(DISP_INTERRUPT_STATUS);
cik              7305 drivers/gpu/drm/radeon/cik.c 	rdev->irq.stat_regs.cik.disp_int_cont = RREG32(DISP_INTERRUPT_STATUS_CONTINUE);
cik              7306 drivers/gpu/drm/radeon/cik.c 	rdev->irq.stat_regs.cik.disp_int_cont2 = RREG32(DISP_INTERRUPT_STATUS_CONTINUE2);
cik              7307 drivers/gpu/drm/radeon/cik.c 	rdev->irq.stat_regs.cik.disp_int_cont3 = RREG32(DISP_INTERRUPT_STATUS_CONTINUE3);
cik              7308 drivers/gpu/drm/radeon/cik.c 	rdev->irq.stat_regs.cik.disp_int_cont4 = RREG32(DISP_INTERRUPT_STATUS_CONTINUE4);
cik              7309 drivers/gpu/drm/radeon/cik.c 	rdev->irq.stat_regs.cik.disp_int_cont5 = RREG32(DISP_INTERRUPT_STATUS_CONTINUE5);
cik              7310 drivers/gpu/drm/radeon/cik.c 	rdev->irq.stat_regs.cik.disp_int_cont6 = RREG32(DISP_INTERRUPT_STATUS_CONTINUE6);
cik              7312 drivers/gpu/drm/radeon/cik.c 	rdev->irq.stat_regs.cik.d1grph_int = RREG32(GRPH_INT_STATUS +
cik              7314 drivers/gpu/drm/radeon/cik.c 	rdev->irq.stat_regs.cik.d2grph_int = RREG32(GRPH_INT_STATUS +
cik              7317 drivers/gpu/drm/radeon/cik.c 		rdev->irq.stat_regs.cik.d3grph_int = RREG32(GRPH_INT_STATUS +
cik              7319 drivers/gpu/drm/radeon/cik.c 		rdev->irq.stat_regs.cik.d4grph_int = RREG32(GRPH_INT_STATUS +
cik              7323 drivers/gpu/drm/radeon/cik.c 		rdev->irq.stat_regs.cik.d5grph_int = RREG32(GRPH_INT_STATUS +
cik              7325 drivers/gpu/drm/radeon/cik.c 		rdev->irq.stat_regs.cik.d6grph_int = RREG32(GRPH_INT_STATUS +
cik              7329 drivers/gpu/drm/radeon/cik.c 	if (rdev->irq.stat_regs.cik.d1grph_int & GRPH_PFLIP_INT_OCCURRED)
cik              7332 drivers/gpu/drm/radeon/cik.c 	if (rdev->irq.stat_regs.cik.d2grph_int & GRPH_PFLIP_INT_OCCURRED)
cik              7335 drivers/gpu/drm/radeon/cik.c 	if (rdev->irq.stat_regs.cik.disp_int & LB_D1_VBLANK_INTERRUPT)
cik              7337 drivers/gpu/drm/radeon/cik.c 	if (rdev->irq.stat_regs.cik.disp_int & LB_D1_VLINE_INTERRUPT)
cik              7339 drivers/gpu/drm/radeon/cik.c 	if (rdev->irq.stat_regs.cik.disp_int_cont & LB_D2_VBLANK_INTERRUPT)
cik              7341 drivers/gpu/drm/radeon/cik.c 	if (rdev->irq.stat_regs.cik.disp_int_cont & LB_D2_VLINE_INTERRUPT)
cik              7345 drivers/gpu/drm/radeon/cik.c 		if (rdev->irq.stat_regs.cik.d3grph_int & GRPH_PFLIP_INT_OCCURRED)
cik              7348 drivers/gpu/drm/radeon/cik.c 		if (rdev->irq.stat_regs.cik.d4grph_int & GRPH_PFLIP_INT_OCCURRED)
cik              7351 drivers/gpu/drm/radeon/cik.c 		if (rdev->irq.stat_regs.cik.disp_int_cont2 & LB_D3_VBLANK_INTERRUPT)
cik              7353 drivers/gpu/drm/radeon/cik.c 		if (rdev->irq.stat_regs.cik.disp_int_cont2 & LB_D3_VLINE_INTERRUPT)
cik              7355 drivers/gpu/drm/radeon/cik.c 		if (rdev->irq.stat_regs.cik.disp_int_cont3 & LB_D4_VBLANK_INTERRUPT)
cik              7357 drivers/gpu/drm/radeon/cik.c 		if (rdev->irq.stat_regs.cik.disp_int_cont3 & LB_D4_VLINE_INTERRUPT)
cik              7362 drivers/gpu/drm/radeon/cik.c 		if (rdev->irq.stat_regs.cik.d5grph_int & GRPH_PFLIP_INT_OCCURRED)
cik              7365 drivers/gpu/drm/radeon/cik.c 		if (rdev->irq.stat_regs.cik.d6grph_int & GRPH_PFLIP_INT_OCCURRED)
cik              7368 drivers/gpu/drm/radeon/cik.c 		if (rdev->irq.stat_regs.cik.disp_int_cont4 & LB_D5_VBLANK_INTERRUPT)
cik              7370 drivers/gpu/drm/radeon/cik.c 		if (rdev->irq.stat_regs.cik.disp_int_cont4 & LB_D5_VLINE_INTERRUPT)
cik              7372 drivers/gpu/drm/radeon/cik.c 		if (rdev->irq.stat_regs.cik.disp_int_cont5 & LB_D6_VBLANK_INTERRUPT)
cik              7374 drivers/gpu/drm/radeon/cik.c 		if (rdev->irq.stat_regs.cik.disp_int_cont5 & LB_D6_VLINE_INTERRUPT)
cik              7378 drivers/gpu/drm/radeon/cik.c 	if (rdev->irq.stat_regs.cik.disp_int & DC_HPD1_INTERRUPT) {
cik              7383 drivers/gpu/drm/radeon/cik.c 	if (rdev->irq.stat_regs.cik.disp_int_cont & DC_HPD2_INTERRUPT) {
cik              7388 drivers/gpu/drm/radeon/cik.c 	if (rdev->irq.stat_regs.cik.disp_int_cont2 & DC_HPD3_INTERRUPT) {
cik              7393 drivers/gpu/drm/radeon/cik.c 	if (rdev->irq.stat_regs.cik.disp_int_cont3 & DC_HPD4_INTERRUPT) {
cik              7398 drivers/gpu/drm/radeon/cik.c 	if (rdev->irq.stat_regs.cik.disp_int_cont4 & DC_HPD5_INTERRUPT) {
cik              7403 drivers/gpu/drm/radeon/cik.c 	if (rdev->irq.stat_regs.cik.disp_int_cont5 & DC_HPD6_INTERRUPT) {
cik              7408 drivers/gpu/drm/radeon/cik.c 	if (rdev->irq.stat_regs.cik.disp_int & DC_HPD1_RX_INTERRUPT) {
cik              7413 drivers/gpu/drm/radeon/cik.c 	if (rdev->irq.stat_regs.cik.disp_int_cont & DC_HPD2_RX_INTERRUPT) {
cik              7418 drivers/gpu/drm/radeon/cik.c 	if (rdev->irq.stat_regs.cik.disp_int_cont2 & DC_HPD3_RX_INTERRUPT) {
cik              7423 drivers/gpu/drm/radeon/cik.c 	if (rdev->irq.stat_regs.cik.disp_int_cont3 & DC_HPD4_RX_INTERRUPT) {
cik              7428 drivers/gpu/drm/radeon/cik.c 	if (rdev->irq.stat_regs.cik.disp_int_cont4 & DC_HPD5_RX_INTERRUPT) {
cik              7433 drivers/gpu/drm/radeon/cik.c 	if (rdev->irq.stat_regs.cik.disp_int_cont5 & DC_HPD6_RX_INTERRUPT) {
cik              7599 drivers/gpu/drm/radeon/cik.c 				if (!(rdev->irq.stat_regs.cik.disp_int & LB_D1_VBLANK_INTERRUPT))
cik              7609 drivers/gpu/drm/radeon/cik.c 				rdev->irq.stat_regs.cik.disp_int &= ~LB_D1_VBLANK_INTERRUPT;
cik              7614 drivers/gpu/drm/radeon/cik.c 				if (!(rdev->irq.stat_regs.cik.disp_int & LB_D1_VLINE_INTERRUPT))
cik              7617 drivers/gpu/drm/radeon/cik.c 				rdev->irq.stat_regs.cik.disp_int &= ~LB_D1_VLINE_INTERRUPT;
cik              7629 drivers/gpu/drm/radeon/cik.c 				if (!(rdev->irq.stat_regs.cik.disp_int_cont & LB_D2_VBLANK_INTERRUPT))
cik              7639 drivers/gpu/drm/radeon/cik.c 				rdev->irq.stat_regs.cik.disp_int_cont &= ~LB_D2_VBLANK_INTERRUPT;
cik              7644 drivers/gpu/drm/radeon/cik.c 				if (!(rdev->irq.stat_regs.cik.disp_int_cont & LB_D2_VLINE_INTERRUPT))
cik              7647 drivers/gpu/drm/radeon/cik.c 				rdev->irq.stat_regs.cik.disp_int_cont &= ~LB_D2_VLINE_INTERRUPT;
cik              7659 drivers/gpu/drm/radeon/cik.c 				if (!(rdev->irq.stat_regs.cik.disp_int_cont2 & LB_D3_VBLANK_INTERRUPT))
cik              7669 drivers/gpu/drm/radeon/cik.c 				rdev->irq.stat_regs.cik.disp_int_cont2 &= ~LB_D3_VBLANK_INTERRUPT;
cik              7674 drivers/gpu/drm/radeon/cik.c 				if (!(rdev->irq.stat_regs.cik.disp_int_cont2 & LB_D3_VLINE_INTERRUPT))
cik              7677 drivers/gpu/drm/radeon/cik.c 				rdev->irq.stat_regs.cik.disp_int_cont2 &= ~LB_D3_VLINE_INTERRUPT;
cik              7689 drivers/gpu/drm/radeon/cik.c 				if (!(rdev->irq.stat_regs.cik.disp_int_cont3 & LB_D4_VBLANK_INTERRUPT))
cik              7699 drivers/gpu/drm/radeon/cik.c 				rdev->irq.stat_regs.cik.disp_int_cont3 &= ~LB_D4_VBLANK_INTERRUPT;
cik              7704 drivers/gpu/drm/radeon/cik.c 				if (!(rdev->irq.stat_regs.cik.disp_int_cont3 & LB_D4_VLINE_INTERRUPT))
cik              7707 drivers/gpu/drm/radeon/cik.c 				rdev->irq.stat_regs.cik.disp_int_cont3 &= ~LB_D4_VLINE_INTERRUPT;
cik              7719 drivers/gpu/drm/radeon/cik.c 				if (!(rdev->irq.stat_regs.cik.disp_int_cont4 & LB_D5_VBLANK_INTERRUPT))
cik              7729 drivers/gpu/drm/radeon/cik.c 				rdev->irq.stat_regs.cik.disp_int_cont4 &= ~LB_D5_VBLANK_INTERRUPT;
cik              7734 drivers/gpu/drm/radeon/cik.c 				if (!(rdev->irq.stat_regs.cik.disp_int_cont4 & LB_D5_VLINE_INTERRUPT))
cik              7737 drivers/gpu/drm/radeon/cik.c 				rdev->irq.stat_regs.cik.disp_int_cont4 &= ~LB_D5_VLINE_INTERRUPT;
cik              7749 drivers/gpu/drm/radeon/cik.c 				if (!(rdev->irq.stat_regs.cik.disp_int_cont5 & LB_D6_VBLANK_INTERRUPT))
cik              7759 drivers/gpu/drm/radeon/cik.c 				rdev->irq.stat_regs.cik.disp_int_cont5 &= ~LB_D6_VBLANK_INTERRUPT;
cik              7764 drivers/gpu/drm/radeon/cik.c 				if (!(rdev->irq.stat_regs.cik.disp_int_cont5 & LB_D6_VLINE_INTERRUPT))
cik              7767 drivers/gpu/drm/radeon/cik.c 				rdev->irq.stat_regs.cik.disp_int_cont5 &= ~LB_D6_VLINE_INTERRUPT;
cik              7789 drivers/gpu/drm/radeon/cik.c 				if (!(rdev->irq.stat_regs.cik.disp_int & DC_HPD1_INTERRUPT))
cik              7792 drivers/gpu/drm/radeon/cik.c 				rdev->irq.stat_regs.cik.disp_int &= ~DC_HPD1_INTERRUPT;
cik              7798 drivers/gpu/drm/radeon/cik.c 				if (!(rdev->irq.stat_regs.cik.disp_int_cont & DC_HPD2_INTERRUPT))
cik              7801 drivers/gpu/drm/radeon/cik.c 				rdev->irq.stat_regs.cik.disp_int_cont &= ~DC_HPD2_INTERRUPT;
cik              7807 drivers/gpu/drm/radeon/cik.c 				if (!(rdev->irq.stat_regs.cik.disp_int_cont2 & DC_HPD3_INTERRUPT))
cik              7810 drivers/gpu/drm/radeon/cik.c 				rdev->irq.stat_regs.cik.disp_int_cont2 &= ~DC_HPD3_INTERRUPT;
cik              7816 drivers/gpu/drm/radeon/cik.c 				if (!(rdev->irq.stat_regs.cik.disp_int_cont3 & DC_HPD4_INTERRUPT))
cik              7819 drivers/gpu/drm/radeon/cik.c 				rdev->irq.stat_regs.cik.disp_int_cont3 &= ~DC_HPD4_INTERRUPT;
cik              7825 drivers/gpu/drm/radeon/cik.c 				if (!(rdev->irq.stat_regs.cik.disp_int_cont4 & DC_HPD5_INTERRUPT))
cik              7828 drivers/gpu/drm/radeon/cik.c 				rdev->irq.stat_regs.cik.disp_int_cont4 &= ~DC_HPD5_INTERRUPT;
cik              7834 drivers/gpu/drm/radeon/cik.c 				if (!(rdev->irq.stat_regs.cik.disp_int_cont5 & DC_HPD6_INTERRUPT))
cik              7837 drivers/gpu/drm/radeon/cik.c 				rdev->irq.stat_regs.cik.disp_int_cont5 &= ~DC_HPD6_INTERRUPT;
cik              7843 drivers/gpu/drm/radeon/cik.c 				if (!(rdev->irq.stat_regs.cik.disp_int & DC_HPD1_RX_INTERRUPT))
cik              7846 drivers/gpu/drm/radeon/cik.c 				rdev->irq.stat_regs.cik.disp_int &= ~DC_HPD1_RX_INTERRUPT;
cik              7852 drivers/gpu/drm/radeon/cik.c 				if (!(rdev->irq.stat_regs.cik.disp_int_cont & DC_HPD2_RX_INTERRUPT))
cik              7855 drivers/gpu/drm/radeon/cik.c 				rdev->irq.stat_regs.cik.disp_int_cont &= ~DC_HPD2_RX_INTERRUPT;
cik              7861 drivers/gpu/drm/radeon/cik.c 				if (!(rdev->irq.stat_regs.cik.disp_int_cont2 & DC_HPD3_RX_INTERRUPT))
cik              7864 drivers/gpu/drm/radeon/cik.c 				rdev->irq.stat_regs.cik.disp_int_cont2 &= ~DC_HPD3_RX_INTERRUPT;
cik              7870 drivers/gpu/drm/radeon/cik.c 				if (!(rdev->irq.stat_regs.cik.disp_int_cont3 & DC_HPD4_RX_INTERRUPT))
cik              7873 drivers/gpu/drm/radeon/cik.c 				rdev->irq.stat_regs.cik.disp_int_cont3 &= ~DC_HPD4_RX_INTERRUPT;
cik              7879 drivers/gpu/drm/radeon/cik.c 				if (!(rdev->irq.stat_regs.cik.disp_int_cont4 & DC_HPD5_RX_INTERRUPT))
cik              7882 drivers/gpu/drm/radeon/cik.c 				rdev->irq.stat_regs.cik.disp_int_cont4 &= ~DC_HPD5_RX_INTERRUPT;
cik              7888 drivers/gpu/drm/radeon/cik.c 				if (!(rdev->irq.stat_regs.cik.disp_int_cont5 & DC_HPD6_RX_INTERRUPT))
cik              7891 drivers/gpu/drm/radeon/cik.c 				rdev->irq.stat_regs.cik.disp_int_cont5 &= ~DC_HPD6_RX_INTERRUPT;
cik               789 drivers/gpu/drm/radeon/radeon.h 	struct cik_irq_stat_regs cik;
cik              2199 drivers/gpu/drm/radeon/radeon.h 	struct cik_asic		cik;
cik               290 drivers/gpu/drm/radeon/radeon_kms.c 			*value = rdev->config.cik.tile_config;
cik               344 drivers/gpu/drm/radeon/radeon_kms.c 			*value = rdev->config.cik.max_backends_per_se *
cik               345 drivers/gpu/drm/radeon/radeon_kms.c 				rdev->config.cik.max_shader_engines;
cik               364 drivers/gpu/drm/radeon/radeon_kms.c 			*value = rdev->config.cik.max_tile_pipes;
cik               384 drivers/gpu/drm/radeon/radeon_kms.c 			*value = rdev->config.cik.backend_map;
cik               413 drivers/gpu/drm/radeon/radeon_kms.c 			*value = rdev->config.cik.max_cu_per_sh;
cik               439 drivers/gpu/drm/radeon/radeon_kms.c 			*value = rdev->config.cik.max_shader_engines;
cik               451 drivers/gpu/drm/radeon/radeon_kms.c 			*value = rdev->config.cik.max_sh_per_se;
cik               486 drivers/gpu/drm/radeon/radeon_kms.c 			value = rdev->config.cik.tile_mode_array;
cik               498 drivers/gpu/drm/radeon/radeon_kms.c 			value = rdev->config.cik.macrotile_mode_array;
cik               510 drivers/gpu/drm/radeon/radeon_kms.c 			*value = rdev->config.cik.backend_enable_mask;
cik               547 drivers/gpu/drm/radeon/radeon_kms.c 			*value = rdev->config.cik.active_cus;