chv_phy_control 1294 drivers/gpu/drm/i915/display/intel_display_power.c u32 phy_control = dev_priv->chv_phy_control; chv_phy_control 1388 drivers/gpu/drm/i915/display/intel_display_power.c phy_status, dev_priv->chv_phy_control); chv_phy_control 1445 drivers/gpu/drm/i915/display/intel_display_power.c dev_priv->chv_phy_control |= PHY_COM_LANE_RESET_DEASSERT(phy); chv_phy_control 1446 drivers/gpu/drm/i915/display/intel_display_power.c I915_WRITE(DISPLAY_PHY_CONTROL, dev_priv->chv_phy_control); chv_phy_control 1449 drivers/gpu/drm/i915/display/intel_display_power.c phy, dev_priv->chv_phy_control); chv_phy_control 1471 drivers/gpu/drm/i915/display/intel_display_power.c dev_priv->chv_phy_control &= ~PHY_COM_LANE_RESET_DEASSERT(phy); chv_phy_control 1472 drivers/gpu/drm/i915/display/intel_display_power.c I915_WRITE(DISPLAY_PHY_CONTROL, dev_priv->chv_phy_control); chv_phy_control 1477 drivers/gpu/drm/i915/display/intel_display_power.c phy, dev_priv->chv_phy_control); chv_phy_control 1555 drivers/gpu/drm/i915/display/intel_display_power.c was_override = dev_priv->chv_phy_control & PHY_CH_POWER_DOWN_OVRD_EN(phy, ch); chv_phy_control 1561 drivers/gpu/drm/i915/display/intel_display_power.c dev_priv->chv_phy_control |= PHY_CH_POWER_DOWN_OVRD_EN(phy, ch); chv_phy_control 1563 drivers/gpu/drm/i915/display/intel_display_power.c dev_priv->chv_phy_control &= ~PHY_CH_POWER_DOWN_OVRD_EN(phy, ch); chv_phy_control 1565 drivers/gpu/drm/i915/display/intel_display_power.c I915_WRITE(DISPLAY_PHY_CONTROL, dev_priv->chv_phy_control); chv_phy_control 1568 drivers/gpu/drm/i915/display/intel_display_power.c phy, ch, dev_priv->chv_phy_control); chv_phy_control 1588 drivers/gpu/drm/i915/display/intel_display_power.c dev_priv->chv_phy_control &= ~PHY_CH_POWER_DOWN_OVRD(0xf, phy, ch); chv_phy_control 1589 drivers/gpu/drm/i915/display/intel_display_power.c dev_priv->chv_phy_control |= PHY_CH_POWER_DOWN_OVRD(mask, phy, ch); chv_phy_control 1592 drivers/gpu/drm/i915/display/intel_display_power.c dev_priv->chv_phy_control |= PHY_CH_POWER_DOWN_OVRD_EN(phy, ch); chv_phy_control 1594 drivers/gpu/drm/i915/display/intel_display_power.c dev_priv->chv_phy_control &= ~PHY_CH_POWER_DOWN_OVRD_EN(phy, ch); chv_phy_control 1596 drivers/gpu/drm/i915/display/intel_display_power.c I915_WRITE(DISPLAY_PHY_CONTROL, dev_priv->chv_phy_control); chv_phy_control 1599 drivers/gpu/drm/i915/display/intel_display_power.c phy, ch, mask, dev_priv->chv_phy_control); chv_phy_control 4750 drivers/gpu/drm/i915/display/intel_display_power.c dev_priv->chv_phy_control = chv_phy_control 4772 drivers/gpu/drm/i915/display/intel_display_power.c dev_priv->chv_phy_control |= chv_phy_control 4775 drivers/gpu/drm/i915/display/intel_display_power.c dev_priv->chv_phy_control |= chv_phy_control 4782 drivers/gpu/drm/i915/display/intel_display_power.c dev_priv->chv_phy_control |= chv_phy_control 4785 drivers/gpu/drm/i915/display/intel_display_power.c dev_priv->chv_phy_control |= chv_phy_control 4788 drivers/gpu/drm/i915/display/intel_display_power.c dev_priv->chv_phy_control |= PHY_COM_LANE_RESET_DEASSERT(DPIO_PHY0); chv_phy_control 4804 drivers/gpu/drm/i915/display/intel_display_power.c dev_priv->chv_phy_control |= chv_phy_control 4807 drivers/gpu/drm/i915/display/intel_display_power.c dev_priv->chv_phy_control |= chv_phy_control 4810 drivers/gpu/drm/i915/display/intel_display_power.c dev_priv->chv_phy_control |= PHY_COM_LANE_RESET_DEASSERT(DPIO_PHY1); chv_phy_control 4817 drivers/gpu/drm/i915/display/intel_display_power.c I915_WRITE(DISPLAY_PHY_CONTROL, dev_priv->chv_phy_control); chv_phy_control 4820 drivers/gpu/drm/i915/display/intel_display_power.c dev_priv->chv_phy_control); chv_phy_control 1556 drivers/gpu/drm/i915/i915_drv.h u32 chv_phy_control;