chnsel            137 drivers/gpu/drm/zte/zx_vou.c 	u32 chnsel;
chnsel            144 drivers/gpu/drm/zte/zx_vou.c 		.chnsel = OSD_CTRL0_GL0_SEL,
chnsel            148 drivers/gpu/drm/zte/zx_vou.c 		.chnsel = OSD_CTRL0_GL1_SEL,
chnsel            156 drivers/gpu/drm/zte/zx_vou.c 		.chnsel = OSD_CTRL0_VL0_SEL,
chnsel            160 drivers/gpu/drm/zte/zx_vou.c 		.chnsel = OSD_CTRL0_VL1_SEL,
chnsel            164 drivers/gpu/drm/zte/zx_vou.c 		.chnsel = OSD_CTRL0_VL2_SEL,
chnsel            617 drivers/gpu/drm/zte/zx_vou.c 		zx_writel_mask(vou->osd + OSD_CTRL0, bits->chnsel, 0);
chnsel            620 drivers/gpu/drm/zte/zx_vou.c 		zx_writel_mask(vou->osd + OSD_CTRL0, bits->chnsel,
chnsel            621 drivers/gpu/drm/zte/zx_vou.c 			       bits->chnsel);