CSC_MODE          138 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.c 	REG_SET(CSC_MODE[opp_id], 0, MPC_OCSC_MODE, ocsc_mode);
CSC_MODE          177 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.c 	REG_SET(CSC_MODE[opp_id], 0, MPC_OCSC_MODE, ocsc_mode);
CSC_MODE           74 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.h 	SRII(CSC_MODE, MPC_OUT, inst),\
CSC_MODE          121 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.h 	uint32_t CSC_MODE[MAX_OPP]; \