CSC_C33_C34_A     155 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.c 		ocsc_regs.csc_c33_c34 = REG(CSC_C33_C34_A[opp_id]);
CSC_C33_C34_A     196 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.c 		ocsc_regs.csc_c33_c34 = REG(CSC_C33_C34_A[opp_id]);
CSC_C33_C34_A      76 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.h 	SRII(CSC_C33_C34_A, MPC_OUT, inst),\
CSC_C33_C34_A     123 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.h 	uint32_t CSC_C33_C34_A[MAX_OPP]; \