chid                7 drivers/gpu/drm/nouveau/include/nvif/cl006b.h 	__u8  chid;
chid                7 drivers/gpu/drm/nouveau/include/nvif/cl506e.h 	__u8  chid;
chid                7 drivers/gpu/drm/nouveau/include/nvif/cl506f.h 	__u8  chid;
chid                7 drivers/gpu/drm/nouveau/include/nvif/cl826e.h 	__u8  chid;
chid                7 drivers/gpu/drm/nouveau/include/nvif/cl826f.h 	__u8  chid;
chid                7 drivers/gpu/drm/nouveau/include/nvif/cl906f.h 	__u8  chid;
chid                8 drivers/gpu/drm/nouveau/include/nvif/cla06f.h 	__u16 chid;
chid                8 drivers/gpu/drm/nouveau/include/nvif/clc36f.h 	__u16 chid;
chid                9 drivers/gpu/drm/nouveau/include/nvkm/core/ramht.h 	int chid;
chid               26 drivers/gpu/drm/nouveau/include/nvkm/core/ramht.h 		       int chid, int addr, u32 handle, u32 context);
chid               29 drivers/gpu/drm/nouveau/include/nvkm/core/ramht.h nvkm_ramht_search(struct nvkm_ramht *, int chid, u32 handle);
chid               24 drivers/gpu/drm/nouveau/include/nvkm/engine/fifo.h 	u16 chid;
chid               58 drivers/gpu/drm/nouveau/include/nvkm/engine/fifo.h nvkm_fifo_chan_chid(struct nvkm_fifo *, int chid, unsigned long *flags);
chid               13 drivers/gpu/drm/nouveau/include/nvkm/engine/sw.h bool nvkm_sw_mthd(struct nvkm_sw *sw, int chid, int subc, u32 mthd, u32 data);
chid              308 drivers/gpu/drm/nouveau/nouveau_abi16.c 	init->channel = chan->chan->chid;
chid              360 drivers/gpu/drm/nouveau/nouveau_abi16.c 		if (chan->chan->chid == channel)
chid               56 drivers/gpu/drm/nouveau/nouveau_chan.c 	NV_PRINTK(warn, cli, "channel %d killed!\n", chan->chid);
chid               77 drivers/gpu/drm/nouveau/nouveau_chan.c 				  chan->chid, nvxx_client(&cli->base)->name);
chid              295 drivers/gpu/drm/nouveau/nouveau_chan.c 				chan->chid = args.volta.chid;
chid              300 drivers/gpu/drm/nouveau/nouveau_chan.c 				chan->chid = args.kepler.chid;
chid              304 drivers/gpu/drm/nouveau/nouveau_chan.c 				chan->chid = args.fermi.chid;
chid              306 drivers/gpu/drm/nouveau/nouveau_chan.c 				chan->chid = args.nv50.chid;
chid              345 drivers/gpu/drm/nouveau/nouveau_chan.c 			chan->chid = args.chid;
chid               13 drivers/gpu/drm/nouveau/nouveau_chan.h 	int chid;
chid              177 drivers/gpu/drm/nouveau/nouveau_fence.c 	fctx->context = chan->drm->chan.context_base + chan->chid;
chid              706 drivers/gpu/drm/nouveau/nouveau_gem.c 		if (temp->chan->chid == req->channel) {
chid               72 drivers/gpu/drm/nouveau/nv84_fence.c 	u64 addr = fctx->vma->addr + chan->chid * 16;
chid               82 drivers/gpu/drm/nouveau/nv84_fence.c 	u64 addr = fctx->vma->addr + prev->chid * 16;
chid               91 drivers/gpu/drm/nouveau/nv84_fence.c 	return nouveau_bo_rd32(priv->bo, chan->chid * 16/4);
chid              100 drivers/gpu/drm/nouveau/nv84_fence.c 	nouveau_bo_wr32(priv->bo, chan->chid * 16 / 4, fctx->base.sequence);
chid               27 drivers/gpu/drm/nouveau/nvkm/core/ramht.c nvkm_ramht_hash(struct nvkm_ramht *ramht, int chid, u32 handle)
chid               36 drivers/gpu/drm/nouveau/nvkm/core/ramht.c 	hash ^= chid << (ramht->bits - 4);
chid               41 drivers/gpu/drm/nouveau/nvkm/core/ramht.c nvkm_ramht_search(struct nvkm_ramht *ramht, int chid, u32 handle)
chid               45 drivers/gpu/drm/nouveau/nvkm/core/ramht.c 	co = ho = nvkm_ramht_hash(ramht, chid, handle);
chid               47 drivers/gpu/drm/nouveau/nvkm/core/ramht.c 		if (ramht->data[co].chid == chid) {
chid               61 drivers/gpu/drm/nouveau/nvkm/core/ramht.c 		  int chid, int addr, u32 handle, u32 context)
chid               68 drivers/gpu/drm/nouveau/nvkm/core/ramht.c 	data->chid = chid;
chid               75 drivers/gpu/drm/nouveau/nvkm/core/ramht.c 				data->chid = -1;
chid              108 drivers/gpu/drm/nouveau/nvkm/core/ramht.c 		  int chid, int addr, u32 handle, u32 context)
chid              112 drivers/gpu/drm/nouveau/nvkm/core/ramht.c 	if (nvkm_ramht_search(ramht, chid, handle))
chid              115 drivers/gpu/drm/nouveau/nvkm/core/ramht.c 	co = ho = nvkm_ramht_hash(ramht, chid, handle);
chid              117 drivers/gpu/drm/nouveau/nvkm/core/ramht.c 		if (ramht->data[co].chid < 0) {
chid              118 drivers/gpu/drm/nouveau/nvkm/core/ramht.c 			return nvkm_ramht_update(ramht, co, object, chid,
chid              155 drivers/gpu/drm/nouveau/nvkm/core/ramht.c 		ramht->data[i].chid = -1;
chid               58 drivers/gpu/drm/nouveau/nvkm/engine/ce/gt215.c 		   en ? en->name : "", chan ? chan->chid : -1,
chid               98 drivers/gpu/drm/nouveau/nvkm/engine/cipher/g84.c 			   chan ? chan->chid : -1, (u64)inst << 12,
chid               35 drivers/gpu/drm/nouveau/nvkm/engine/disp/basenv50.c 		    struct nv50_disp *disp, int chid,
chid               58 drivers/gpu/drm/nouveau/nvkm/engine/disp/basenv50.c 	return nv50_disp_dmac_new_(func, mthd, disp, chid + head,
chid               55 drivers/gpu/drm/nouveau/nvkm/engine/disp/changf119.c 	const u32 mask = 0x00000001 << chan->chid.user;
chid               33 drivers/gpu/drm/nouveau/nvkm/engine/disp/changv100.c 	return 0x690000 + ((chan->chid.user - 1) * 0x1000);
chid               89 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c 					 mthd->name, chan->chid.user);
chid              125 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c nv50_disp_chan_uevent_send(struct nv50_disp *disp, int chid)
chid              130 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c 	nvkm_event_send(&disp->uevent, 1, chid, &rep, sizeof(rep));
chid              146 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c 		notify->index = chan->chid.user;
chid              164 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c 	return 0x640000 + (chan->chid.user * 0x1000);
chid              171 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c 	const u32 mask = 0x00010001 << chan->chid.user;
chid              172 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c 	const u32 data = en ? 0x00010000 << chan->chid.user : 0x00000000;
chid              319 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c 	if (chan->chid.user >= 0)
chid              320 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c 		disp->chan[chan->chid.user] = NULL;
chid              354 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c 	chan->chid.ctrl = ctrl;
chid              355 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c 	chan->chid.user = user;
chid              358 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c 	if (disp->chan[chan->chid.user]) {
chid              359 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c 		chan->chid.user = -1;
chid              362 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c 	disp->chan[chan->chid.user] = chan;
chid               17 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.h 	} chid;
chid               40 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.h 			struct nv50_disp *, int chid, int head, u64 push,
chid               75 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.h 			struct nv50_disp *, int chid,
chid               80 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.h 			struct nv50_disp *, int chid,
chid               85 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.h 			struct nv50_disp *, int chid,
chid               35 drivers/gpu/drm/nouveau/nvkm/engine/disp/corenv50.c 		    struct nv50_disp *disp, int chid,
chid               55 drivers/gpu/drm/nouveau/nvkm/engine/disp/corenv50.c 	return nv50_disp_dmac_new_(func, mthd, disp, chid, 0,
chid               30 drivers/gpu/drm/nouveau/nvkm/engine/disp/cursgv100.c 	const u32 soff = (chan->chid.ctrl - 1) * 0x04;
chid               52 drivers/gpu/drm/nouveau/nvkm/engine/disp/cursgv100.c 	const u32 hoff = chan->chid.ctrl * 4;
chid               63 drivers/gpu/drm/nouveau/nvkm/engine/disp/cursgv100.c 	nvkm_wr32(device, 0x6104e0 + chan->chid.ctrl * 4, 0x00000001);
chid               34 drivers/gpu/drm/nouveau/nvkm/engine/disp/dmacgf119.c 				 chan->chid.user, -9, handle,
chid               35 drivers/gpu/drm/nouveau/nvkm/engine/disp/dmacgf119.c 				 chan->chid.user << 27 | 0x00000001);
chid               43 drivers/gpu/drm/nouveau/nvkm/engine/disp/dmacgf119.c 	int ctrl = chan->chid.ctrl;
chid               44 drivers/gpu/drm/nouveau/nvkm/engine/disp/dmacgf119.c 	int user = chan->chid.user;
chid               63 drivers/gpu/drm/nouveau/nvkm/engine/disp/dmacgf119.c 	int ctrl = chan->chid.ctrl;
chid               64 drivers/gpu/drm/nouveau/nvkm/engine/disp/dmacgf119.c 	int user = chan->chid.user;
chid               33 drivers/gpu/drm/nouveau/nvkm/engine/disp/dmacgp102.c 	int ctrl = chan->chid.ctrl;
chid               34 drivers/gpu/drm/nouveau/nvkm/engine/disp/dmacgp102.c 	int user = chan->chid.user;
chid               31 drivers/gpu/drm/nouveau/nvkm/engine/disp/dmacgv100.c 	const u32 soff = (chan->chid.ctrl - 1) * 0x04;
chid               45 drivers/gpu/drm/nouveau/nvkm/engine/disp/dmacgv100.c 				 chan->chid.user, -9, handle,
chid               46 drivers/gpu/drm/nouveau/nvkm/engine/disp/dmacgv100.c 				 chan->chid.user << 25 | 0x00000040);
chid               53 drivers/gpu/drm/nouveau/nvkm/engine/disp/dmacgv100.c 	const u32 coff = chan->chid.ctrl * 0x04;
chid               64 drivers/gpu/drm/nouveau/nvkm/engine/disp/dmacgv100.c 	const u32 uoff = (chan->chid.ctrl - 1) * 0x1000;
chid               65 drivers/gpu/drm/nouveau/nvkm/engine/disp/dmacgv100.c 	const u32 poff = chan->chid.ctrl * 0x10;
chid               66 drivers/gpu/drm/nouveau/nvkm/engine/disp/dmacgv100.c 	const u32 coff = chan->chid.ctrl * 0x04;
chid               36 drivers/gpu/drm/nouveau/nvkm/engine/disp/dmacnv50.c 		    struct nv50_disp *disp, int chid, int head, u64 push,
chid               44 drivers/gpu/drm/nouveau/nvkm/engine/disp/dmacnv50.c 	ret = nv50_disp_chan_new_(func, mthd, disp, chid, chid, head, oclass,
chid               74 drivers/gpu/drm/nouveau/nvkm/engine/disp/dmacnv50.c 				 chan->chid.user, -10, handle,
chid               75 drivers/gpu/drm/nouveau/nvkm/engine/disp/dmacnv50.c 				 chan->chid.user << 28 |
chid               76 drivers/gpu/drm/nouveau/nvkm/engine/disp/dmacnv50.c 				 chan->chid.user);
chid               84 drivers/gpu/drm/nouveau/nvkm/engine/disp/dmacnv50.c 	int ctrl = chan->chid.ctrl;
chid               85 drivers/gpu/drm/nouveau/nvkm/engine/disp/dmacnv50.c 	int user = chan->chid.user;
chid              104 drivers/gpu/drm/nouveau/nvkm/engine/disp/dmacnv50.c 	int ctrl = chan->chid.ctrl;
chid              105 drivers/gpu/drm/nouveau/nvkm/engine/disp/dmacnv50.c 	int user = chan->chid.user;
chid               90 drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.c gf119_disp_intr_error(struct nv50_disp *disp, int chid)
chid               94 drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.c 	u32 stat = nvkm_rd32(device, 0x6101f0 + (chid * 12));
chid               97 drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.c 	u32 data = nvkm_rd32(device, 0x6101f4 + (chid * 12));
chid               98 drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.c 	u32 code = nvkm_rd32(device, 0x6101f8 + (chid * 12));
chid              104 drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.c 		   chid, stat, type, reason ? reason->name : "",
chid              107 drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.c 	if (chid < ARRAY_SIZE(disp->chan)) {
chid              110 drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.c 			nv50_disp_chan_mthd(disp->chan[chid], NV_DBG_ERROR);
chid              117 drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.c 	nvkm_wr32(device, 0x61009c, (1 << chid));
chid              118 drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.c 	nvkm_wr32(device, 0x6101f0 + (chid * 12), 0x90000000);
chid              132 drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.c 			int chid = __ffs(stat); stat &= ~(1 << chid);
chid              133 drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.c 			nv50_disp_chan_uevent_send(disp, chid);
chid              134 drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.c 			nvkm_wr32(device, 0x61008c, 1 << chid);
chid              141 drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.c 		int chid = ffs(stat) - 1;
chid              142 drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.c 		if (chid >= 0)
chid              143 drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.c 			disp->func->intr_error(disp, chid);
chid               31 drivers/gpu/drm/nouveau/nvkm/engine/disp/gp102.c gp102_disp_intr_error(struct nv50_disp *disp, int chid)
chid               35 drivers/gpu/drm/nouveau/nvkm/engine/disp/gp102.c 	u32 mthd = nvkm_rd32(device, 0x6111f0 + (chid * 12));
chid               36 drivers/gpu/drm/nouveau/nvkm/engine/disp/gp102.c 	u32 data = nvkm_rd32(device, 0x6111f4 + (chid * 12));
chid               37 drivers/gpu/drm/nouveau/nvkm/engine/disp/gp102.c 	u32 unkn = nvkm_rd32(device, 0x6111f8 + (chid * 12));
chid               40 drivers/gpu/drm/nouveau/nvkm/engine/disp/gp102.c 		   chid, (mthd & 0x0000ffc), data, mthd, unkn);
chid               42 drivers/gpu/drm/nouveau/nvkm/engine/disp/gp102.c 	if (chid < ARRAY_SIZE(disp->chan)) {
chid               45 drivers/gpu/drm/nouveau/nvkm/engine/disp/gp102.c 			nv50_disp_chan_mthd(disp->chan[chid], NV_DBG_ERROR);
chid               52 drivers/gpu/drm/nouveau/nvkm/engine/disp/gp102.c 	nvkm_wr32(device, 0x61009c, (1 << chid));
chid               53 drivers/gpu/drm/nouveau/nvkm/engine/disp/gp102.c 	nvkm_wr32(device, 0x6111f0 + (chid * 12), 0x90000000);
chid               97 drivers/gpu/drm/nouveau/nvkm/engine/disp/gv100.c gv100_disp_exception(struct nv50_disp *disp, int chid)
chid              101 drivers/gpu/drm/nouveau/nvkm/engine/disp/gv100.c 	u32 stat = nvkm_rd32(device, 0x611020 + (chid * 12));
chid              104 drivers/gpu/drm/nouveau/nvkm/engine/disp/gv100.c 	u32 data = nvkm_rd32(device, 0x611024 + (chid * 12));
chid              105 drivers/gpu/drm/nouveau/nvkm/engine/disp/gv100.c 	u32 code = nvkm_rd32(device, 0x611028 + (chid * 12));
chid              111 drivers/gpu/drm/nouveau/nvkm/engine/disp/gv100.c 		   chid, stat, type, reason ? reason->name : "",
chid              114 drivers/gpu/drm/nouveau/nvkm/engine/disp/gv100.c 	if (chid < ARRAY_SIZE(disp->chan) && disp->chan[chid]) {
chid              117 drivers/gpu/drm/nouveau/nvkm/engine/disp/gv100.c 			nv50_disp_chan_mthd(disp->chan[chid], NV_DBG_ERROR);
chid              124 drivers/gpu/drm/nouveau/nvkm/engine/disp/gv100.c 	nvkm_wr32(device, 0x611020 + (chid * 12), 0x90000000);
chid              614 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c nv50_disp_intr_error(struct nv50_disp *disp, int chid)
chid              618 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 	u32 data = nvkm_rd32(device, 0x610084 + (chid * 0x08));
chid              619 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 	u32 addr = nvkm_rd32(device, 0x610080 + (chid * 0x08));
chid              631 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 		   chid, mthd, data);
chid              633 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 	if (chid < ARRAY_SIZE(disp->chan)) {
chid              636 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 			nv50_disp_chan_mthd(disp->chan[chid], NV_DBG_ERROR);
chid              643 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 	nvkm_wr32(device, 0x610020, 0x00010000 << chid);
chid              644 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 	nvkm_wr32(device, 0x610080 + (chid * 0x08), 0x90000000);
chid              655 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 		u32 chid = __ffs(intr0 & 0x001f0000) - 16;
chid              656 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 		nv50_disp_intr_error(disp, chid);
chid              657 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 		intr0 &= ~(0x00010000 << chid);
chid              661 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 		u32 chid = __ffs(intr0 & 0x0000001f);
chid              662 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 		nv50_disp_chan_uevent_send(disp, chid);
chid              663 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 		intr0 &= ~(0x00000001 << chid);
chid               57 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.h 	void (*intr_error)(struct nv50_disp *, int chid);
chid               35 drivers/gpu/drm/nouveau/nvkm/engine/disp/ovlynv50.c 		    struct nv50_disp *disp, int chid,
chid               58 drivers/gpu/drm/nouveau/nvkm/engine/disp/ovlynv50.c 	return nv50_disp_dmac_new_(func, mthd, disp, chid + head,
chid               35 drivers/gpu/drm/nouveau/nvkm/engine/disp/piocgf119.c 	int ctrl = chan->chid.ctrl;
chid               36 drivers/gpu/drm/nouveau/nvkm/engine/disp/piocgf119.c 	int user = chan->chid.user;
chid               54 drivers/gpu/drm/nouveau/nvkm/engine/disp/piocgf119.c 	int ctrl = chan->chid.ctrl;
chid               55 drivers/gpu/drm/nouveau/nvkm/engine/disp/piocgf119.c 	int user = chan->chid.user;
chid               35 drivers/gpu/drm/nouveau/nvkm/engine/disp/piocnv50.c 	int ctrl = chan->chid.ctrl;
chid               36 drivers/gpu/drm/nouveau/nvkm/engine/disp/piocnv50.c 	int user = chan->chid.user;
chid               54 drivers/gpu/drm/nouveau/nvkm/engine/disp/piocnv50.c 	int ctrl = chan->chid.ctrl;
chid               55 drivers/gpu/drm/nouveau/nvkm/engine/disp/piocnv50.c 	int user = chan->chid.user;
chid               49 drivers/gpu/drm/nouveau/nvkm/engine/disp/wimmgv100.c 		     struct nv50_disp *disp, int chid,
chid               72 drivers/gpu/drm/nouveau/nvkm/engine/disp/wimmgv100.c 	return nv50_disp_dmac_new_(func, mthd, disp, chid + wndw,
chid              151 drivers/gpu/drm/nouveau/nvkm/engine/disp/wndwgv100.c 		     struct nv50_disp *disp, int chid,
chid              174 drivers/gpu/drm/nouveau/nvkm/engine/disp/wndwgv100.c 	return nv50_disp_dmac_new_(func, mthd, disp, chid + wndw,
chid               37 drivers/gpu/drm/nouveau/nvkm/engine/fifo/base.c nvkm_fifo_recover_chan(struct nvkm_fifo *fifo, int chid)
chid               43 drivers/gpu/drm/nouveau/nvkm/engine/fifo/base.c 	fifo->func->recover_chan(fifo, chid);
chid              105 drivers/gpu/drm/nouveau/nvkm/engine/fifo/base.c nvkm_fifo_chan_chid(struct nvkm_fifo *fifo, int chid, unsigned long *rflags)
chid              111 drivers/gpu/drm/nouveau/nvkm/engine/fifo/base.c 		if (chan->chid == chid) {
chid              123 drivers/gpu/drm/nouveau/nvkm/engine/fifo/base.c nvkm_fifo_kevent(struct nvkm_fifo *fifo, int chid)
chid              125 drivers/gpu/drm/nouveau/nvkm/engine/fifo/base.c 	nvkm_event_send(&fifo->kevent, 1, chid, NULL, 0);
chid              136 drivers/gpu/drm/nouveau/nvkm/engine/fifo/base.c 		notify->index = chan->chid;
chid              322 drivers/gpu/drm/nouveau/nvkm/engine/fifo/chan.c 		__clear_bit(chan->chid, fifo->mask);
chid              406 drivers/gpu/drm/nouveau/nvkm/engine/fifo/chan.c 	chan->chid = find_first_zero_bit(fifo->mask, NVKM_FIFO_CHID_NR);
chid              407 drivers/gpu/drm/nouveau/nvkm/engine/fifo/chan.c 	if (chan->chid >= NVKM_FIFO_CHID_NR) {
chid              412 drivers/gpu/drm/nouveau/nvkm/engine/fifo/chan.c 	__set_bit(chan->chid, fifo->mask);
chid              417 drivers/gpu/drm/nouveau/nvkm/engine/fifo/chan.c 		     base + user * chan->chid;
chid              115 drivers/gpu/drm/nouveau/nvkm/engine/fifo/chang84.c 			   chan->base.chid, chan->base.object.client->name);
chid              211 drivers/gpu/drm/nouveau/nvkm/engine/fifo/chang84.c 	u32 chid = chan->base.chid;
chid              213 drivers/gpu/drm/nouveau/nvkm/engine/fifo/chang84.c 	nvkm_wr32(device, 0x002600 + (chid * 4), 0x80000000 | addr);
chid               81 drivers/gpu/drm/nouveau/nvkm/engine/fifo/channv50.c 			   chan->base.chid, chan->base.object.client->name);
chid              184 drivers/gpu/drm/nouveau/nvkm/engine/fifo/channv50.c 	u32 chid = chan->base.chid;
chid              187 drivers/gpu/drm/nouveau/nvkm/engine/fifo/channv50.c 	nvkm_mask(device, 0x002600 + (chid * 4), 0x80000000, 0x00000000);
chid              189 drivers/gpu/drm/nouveau/nvkm/engine/fifo/channv50.c 	nvkm_wr32(device, 0x002600 + (chid * 4), 0x00000000);
chid              199 drivers/gpu/drm/nouveau/nvkm/engine/fifo/channv50.c 	u32 chid = chan->base.chid;
chid              201 drivers/gpu/drm/nouveau/nvkm/engine/fifo/channv50.c 	nvkm_wr32(device, 0x002600 + (chid * 4), 0x80000000 | addr);
chid               65 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmag84.c 	args->v0.chid = chan->base.chid;
chid               52 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv04.c 	u32 context = 0x80000000 | chan->base.chid << 24;
chid               67 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv04.c 	hash = nvkm_ramht_insert(imem->ramht, object, chan->base.chid, 4,
chid               84 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv04.c 	u32 chid;
chid               91 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv04.c 	chid = nvkm_rd32(device, NV03_PFIFO_CACHE1_PUSH1) & mask;
chid               92 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv04.c 	if (chid == chan->base.chid) {
chid              121 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv04.c 	nvkm_mask(device, NV04_PFIFO_MODE, 1 << chan->base.chid, 0);
chid              132 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv04.c 	u32 mask = 1 << chan->base.chid;
chid              202 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv04.c 	args->v0.chid = chan->base.chid;
chid              203 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv04.c 	chan->ramfc = chan->base.chid * 32;
chid               73 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv10.c 	args->v0.chid = chan->base.chid;
chid               74 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv10.c 	chan->ramfc = chan->base.chid * 32;
chid               74 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv17.c 	args->v0.chid = chan->base.chid;
chid               75 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv17.c 	chan->ramfc = chan->base.chid * 64;
chid               68 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv40.c 	int chid;
chid               76 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv40.c 	chid = nvkm_rd32(device, 0x003204) & (fifo->base.nr - 1);
chid               77 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv40.c 	if (chid == chan->base.chid)
chid               98 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv40.c 	int chid;
chid              107 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv40.c 	chid = nvkm_rd32(device, 0x003204) & (fifo->base.nr - 1);
chid              108 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv40.c 	if (chid == chan->base.chid)
chid              148 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv40.c 	u32 context = chan->base.chid << 23;
chid              163 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv40.c 	hash = nvkm_ramht_insert(imem->ramht, object, chan->base.chid, 4,
chid              221 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv40.c 	args->v0.chid = chan->base.chid;
chid              222 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv40.c 	chan->ramfc = chan->base.chid * 128;
chid               65 drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv50.c 	args->v0.chid = chan->base.chid;
chid               66 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c 		nvkm_wo32(cur, (nr * 8) + 0, chan->base.chid);
chid              181 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c 	u32 chid = chan->base.chid;
chid              184 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c 		   nvkm_subdev_name[engine->subdev.index], chid);
chid              187 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c 	nvkm_mask(device, 0x003004 + (chid * 0x08), 0x00000001, 0x00000000);
chid              194 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c 	nvkm_fifo_kevent(&fifo->base, chid);
chid              302 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c 		   info->reason, er ? er->name : "", chan ? chan->chid : -1,
chid              332 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c 		u32 chid = (stat & 0x0000007f);
chid              337 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c 				if (chan->base.chid == chid) {
chid              412 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c 	u32 chid = nvkm_rd32(device, 0x040120 + (unit * 0x2000)) & 0x7f;
chid              422 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c 			if (nvkm_sw_mthd(device->sw, chid, subc, mthd, data))
chid              429 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c 		chan = nvkm_fifo_chan_chid(&fifo->base, chid, &flags);
chid              432 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c 			   unit, show, msg, chid, chan ? chan->inst->addr : 0,
chid              241 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c 	nvkm_wo32(memory, offset + 0, chan->base.chid);
chid              330 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c gk104_fifo_recover_chid(struct gk104_fifo *fifo, int runl, int chid)
chid              336 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c 		if (chan->base.chid == chid) {
chid              343 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c 		if (cgrp->id == chid) {
chid              356 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c gk104_fifo_recover_chan(struct nvkm_fifo *base, int chid)
chid              361 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c 	const u32  stat = nvkm_rd32(device, 0x800004 + (chid * 0x08));
chid              372 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c 	chan = gk104_fifo_recover_chid(fifo, runl, chid);
chid              375 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c 		nvkm_fifo_kevent(&fifo->base, chid);
chid              379 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c 	nvkm_wr32(device, 0x800004 + (chid * 0x08), stat | 0x00000800);
chid              380 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c 	nvkm_warn(subdev, "channel %d: killed\n", chid);
chid              389 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c 		if (!status.chan || status.chan->id != chid)
chid              527 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c 		   info->reason, er ? er->name : "", chan ? chan->chid : -1,
chid              532 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c 		gk104_fifo_recover_chan(&fifo->base, chan->chid);
chid              692 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c 	u32 chid = nvkm_rd32(device, 0x040120 + (unit * 0x2000)) & 0xfff;
chid              702 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c 			if (nvkm_sw_mthd(device->sw, chid, subc, mthd, data))
chid              711 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c 		chan = nvkm_fifo_chan_chid(&fifo->base, chid, &flags);
chid              714 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c 			   unit, show, msg, chid, chan ? chan->inst->addr : 0,
chid              739 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c 	u32 chid = nvkm_rd32(device, 0x040120 + (unit * 0x2000)) & 0xfff;
chid              745 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c 			   unit, stat, msg, chid,
chid               36 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gm107.c 	nvkm_wo32(memory, offset + 0, chan->base.chid);
chid               67 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifog84.c 	args->v0.chid = chan->base.chid;
chid               81 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogf100.c 	nvkm_wr32(device, 0x002634, chan->base.chid);
chid               83 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogf100.c 		if (nvkm_rd32(device, 0x002634) == chan->base.chid)
chid               87 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogf100.c 			   chan->base.chid, chan->base.object.client->name);
chid              164 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogf100.c 	u32 coff = chan->base.chid * 8;
chid              184 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogf100.c 	u32 coff = chan->base.chid * 8;
chid              258 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogf100.c 	args->v0.chid = chan->base.chid;
chid              262 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogf100.c 	usermem = chan->base.chid * 0x1000;
chid               50 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogk104.c 		nvkm_wr32(device, 0x002634, chan->base.chid);
chid               57 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogk104.c 			   cgrp ? cgrp->id : chan->base.chid, client->name);
chid               58 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogk104.c 		nvkm_fifo_recover_chan(&fifo->base, chan->base.chid);
chid              189 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogk104.c 	u32 coff = chan->base.chid * 8;
chid              208 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogk104.c 	u32 coff = chan->base.chid * 8;
chid              243 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogk104.c gk104_fifo_gpfifo_new_(struct gk104_fifo *fifo, u64 *runlists, u16 *chid,
chid              282 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogk104.c 	*chid = chan->base.chid;
chid              291 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogk104.c 		chan->cgrp->id = chan->base.chid;
chid              298 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogk104.c 	usermem = chan->base.chid * 0x200;
chid              321 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogk104.c 	nvkm_wo32(chan->base.inst, 0xe8, chan->base.chid);
chid              350 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogk104.c 					      &args->v0.chid,
chid               34 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogv100.c 	return chan->chid;
chid              124 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogv100.c 		       struct gk104_fifo *fifo, u64 *runlists, u16 *chid,
chid              161 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogv100.c 	*chid = chan->base.chid;
chid              171 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogv100.c 		chan->cgrp->id = chan->base.chid;
chid              178 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogv100.c 	usermem = chan->base.chid * 0x200;
chid              213 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogv100.c 	nvkm_wo32(chan->base.inst, 0x0e8, chan->base.chid);
chid              244 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogv100.c 					      &args->v0.chid,
chid               67 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifonv50.c 	args->v0.chid = chan->base.chid;
chid               35 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifotu102.c 	return (chan->runl << 16) | chan->base.chid;
chid               72 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifotu102.c 					      &args->v0.chid,
chid               36 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gv100.c 	const u64 user = nvkm_memory_addr(usermem) + (chan->base.chid * 0x200);
chid               41 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gv100.c 	nvkm_wo32(memory, offset + 0x8, lower_32_bits(inst) | chan->base.chid);
chid              108 drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.c nv04_fifo_swmthd(struct nvkm_device *device, u32 chid, u32 addr, u32 data)
chid              127 drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.c 			handled = nvkm_sw_mthd(sw, chid, subc, mthd, data);
chid              137 drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.c nv04_fifo_cache_error(struct nv04_fifo *fifo, u32 chid, u32 get)
chid              163 drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.c 	    !nv04_fifo_swmthd(device, chid, mthd, data)) {
chid              164 drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.c 		chan = nvkm_fifo_chan_chid(&fifo->base, chid, &flags);
chid              167 drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.c 			   chid, chan ? chan->object.client->name : "unknown",
chid              188 drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.c nv04_fifo_dma_pusher(struct nv04_fifo *fifo, u32 chid)
chid              200 drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.c 	chan = nvkm_fifo_chan_chid(&fifo->base, chid, &flags);
chid              211 drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.c 			   chid, name, ho_get, dma_get, ho_put, dma_put,
chid              226 drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.c 			   chid, name, dma_get, dma_put, state,
chid              247 drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.c 	u32 reassign, chid, get, sem;
chid              252 drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.c 	chid = nvkm_rd32(device, NV03_PFIFO_CACHE1_PUSH1) & (fifo->base.nr - 1);
chid              256 drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.c 		nv04_fifo_cache_error(fifo, chid, get);
chid              261 drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.c 		nv04_fifo_dma_pusher(fifo, chid);
chid               11 drivers/gpu/drm/nouveau/nvkm/engine/fifo/priv.h void nvkm_fifo_kevent(struct nvkm_fifo *, int chid);
chid               12 drivers/gpu/drm/nouveau/nvkm/engine/fifo/priv.h void nvkm_fifo_recover_chan(struct nvkm_fifo *, int chid);
chid               30 drivers/gpu/drm/nouveau/nvkm/engine/fifo/priv.h 	void (*recover_chan)(struct nvkm_fifo *, int chid);
chid             1562 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c 	int chid = -1;
chid             1567 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c 		chid = chan->chid;
chid             1588 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c 				   chid, inst << 12, name, subc,
chid             1598 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c 			   chid, inst << 12, name, subc, class, mthd, data);
chid             1608 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c 			   code, en ? en->name : "", chid, inst << 12,
chid             1616 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c 			   chid, inst << 12, name);
chid              362 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv04.c 	int chid;
chid             1077 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv04.c 		int chid = nvkm_rd32(device, NV04_PGRAPH_CTX_USER) >> 24;
chid             1078 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv04.c 		if (chid < ARRAY_SIZE(gr->chan))
chid             1079 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv04.c 			chan = gr->chan[chid];
chid             1085 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv04.c nv04_gr_load_context(struct nv04_gr_chan *chan, int chid)
chid             1094 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv04.c 	nvkm_mask(device, NV04_PGRAPH_CTX_USER, 0xff000000, chid << 24);
chid             1119 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv04.c 	int chid;
chid             1129 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv04.c 	chid = (nvkm_rd32(device, NV04_PGRAPH_TRAPPED_ADDR) >> 24) & 0x0f;
chid             1130 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv04.c 	next = gr->chan[chid];
chid             1132 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv04.c 		nv04_gr_load_context(next, chid);
chid             1155 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv04.c 	gr->chan[chan->chid] = NULL;
chid             1195 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv04.c 	chan->chid = fifoch->chid;
chid             1201 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv04.c 	gr->chan[chan->chid] = chan;
chid             1281 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv04.c 	u32 chid = (addr & 0x0f000000) >> 24;
chid             1293 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv04.c 	chan = gr->chan[chid];
chid             1319 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv04.c 			   show, msg, nsource, src, nstatus, sta, chid,
chid              402 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c 	int chid;
chid              552 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c 		int chid = nvkm_rd32(device, 0x400148) >> 24;
chid              553 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c 		if (chid < ARRAY_SIZE(gr->chan))
chid              554 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c 			chan = gr->chan[chid];
chid              812 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c nv10_gr_load_dma_vtxbuf(struct nv10_gr_chan *chan, int chid, u32 inst)
chid              861 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c 		0x2c000000 | chid << 20 | subchan << 16 | 0x18c);
chid              883 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c nv10_gr_load_context(struct nv10_gr_chan *chan, int chid)
chid              901 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c 	nv10_gr_load_dma_vtxbuf(chan, chid, inst);
chid              904 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c 	nvkm_mask(device, NV10_PGRAPH_CTX_USER, 0xff000000, chid << 24);
chid              937 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c 	int chid;
chid              947 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c 	chid = (nvkm_rd32(device, NV04_PGRAPH_TRAPPED_ADDR) >> 20) & 0x1f;
chid              948 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c 	next = gr->chan[chid];
chid              950 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c 		nv10_gr_load_context(next, chid);
chid              978 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c 	gr->chan[chan->chid] = NULL;
chid             1014 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c 	chan->chid = fifoch->chid;
chid             1034 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c 	NV_WRITE_CTX(NV10_PGRAPH_CTX_USER, chan->chid << 24);
chid             1039 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c 	gr->chan[chan->chid] = chan;
chid             1090 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c 	u32 chid = (addr & 0x01f00000) >> 20;
chid             1101 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c 	chan = gr->chan[chid];
chid             1127 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c 			   show, msg, nsource, src, nstatus, sta, chid,
chid               24 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c 	nvkm_wo32(gr->ctxtab, chan->chid * 4, inst >> 4);
chid               36 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c 	int chid = -1;
chid               40 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c 		chid = (nvkm_rd32(device, 0x400148) & 0x1f000000) >> 24;
chid               41 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c 	if (chan->chid == chid) {
chid               54 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c 	nvkm_wo32(gr->ctxtab, chan->chid * 4, 0x00000000);
chid               86 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c 	chan->chid = fifoch->chid;
chid               96 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c 	nvkm_wo32(chan->inst, 0x0000, 0x00000001 | (chan->chid << 24));
chid              190 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c 	u32 chid = (addr & 0x01f00000) >> 20;
chid              199 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c 	chan = nvkm_fifo_chan_chid(device->fifo, chid, &flags);
chid              211 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c 			   show, msg, nsource, src, nstatus, sta, chid,
chid               28 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.h 	int chid;
chid               32 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv25.c 	chan->chid = fifoch->chid;
chid               42 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv25.c 	nvkm_wo32(chan->inst, 0x0028, 0x00000001 | (chan->chid << 24));
chid               32 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv2a.c 	chan->chid = fifoch->chid;
chid               42 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv2a.c 	nvkm_wo32(chan->inst, 0x0000, 0x00000001 | (chan->chid << 24));
chid               33 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv30.c 	chan->chid = fifoch->chid;
chid               43 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv30.c 	nvkm_wo32(chan->inst, 0x0028, 0x00000001 | (chan->chid << 24));
chid               32 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv34.c 	chan->chid = fifoch->chid;
chid               42 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv34.c 	nvkm_wo32(chan->inst, 0x0028, 0x00000001 | (chan->chid << 24));
chid               32 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv35.c 	chan->chid = fifoch->chid;
chid               42 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv35.c 	nvkm_wo32(chan->inst, 0x0028, 0x00000001 | (chan->chid << 24));
chid              278 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv40.c 			   chan ? chan->fifo->chid : -1, inst << 4,
chid              396 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv50.c 		     int chid, u64 inst, const char *name)
chid              436 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv50.c 					   chid, inst, name, subc, class, mthd,
chid              461 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv50.c 					   "40084c %08x\n", chid, inst, name,
chid              638 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv50.c 	int chid = -1;
chid              643 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv50.c 		chid = chan->chid;
chid              655 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv50.c 		if (!nv50_gr_trap_handler(gr, show, chid, (u64)inst << 12, name))
chid              668 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv50.c 			   stat, msg, chid, (u64)inst << 12, name,
chid              216 drivers/gpu/drm/nouveau/nvkm/engine/mpeg/nv31.c 			   mpeg->chan ? mpeg->chan->fifo->chid : -1,
chid              185 drivers/gpu/drm/nouveau/nvkm/engine/mpeg/nv44.c 			   chan ? chan->fifo->chid : -1, inst << 4,
chid               57 drivers/gpu/drm/nouveau/nvkm/engine/sec/g98.c 		   en ? en->name : "UNKNOWN", chan ? chan->chid : -1,
chid               30 drivers/gpu/drm/nouveau/nvkm/engine/sw/base.c nvkm_sw_mthd(struct nvkm_sw *sw, int chid, int subc, u32 mthd, u32 data)
chid               38 drivers/gpu/drm/nouveau/nvkm/engine/sw/base.c 		if (chan->fifo->chid == chid) {
chid              187 drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv50.c 		   chan ? chan->chid : -1, inst,
chid              743 drivers/iio/adc/qcom-pm8xxx-xoadc.c 	int chid;
chid              757 drivers/iio/adc/qcom-pm8xxx-xoadc.c 	chid = 0;
chid              764 drivers/iio/adc/qcom-pm8xxx-xoadc.c 		chid++;
chid              803 drivers/iio/adc/qcom-pm8xxx-xoadc.c 	iio_chan->channel = chid;
chid              222 drivers/net/wireless/intersil/hostap/hostap_info.c 	req.channel = selected->chid;
chid              660 drivers/net/wireless/intersil/hostap/hostap_ioctl.c 			req.channel = entry->chid;
chid             1839 drivers/net/wireless/intersil/hostap/hostap_ioctl.c 		chan = le16_to_cpu(scan->chid);
chid              288 drivers/net/wireless/intersil/hostap/hostap_proc.c 		   le16_to_cpu(scanres->chid),
chid              231 drivers/net/wireless/intersil/hostap/hostap_wlan.h 	__le16 chid;
chid              244 drivers/net/wireless/intersil/hostap/hostap_wlan.h 	__le16 chid;
chid             1676 drivers/net/wireless/marvell/mwifiex/scan.c 	int chid;
chid             1689 drivers/net/wireless/marvell/mwifiex/scan.c 		for (chid = 0 ; chid < MWIFIEX_USER_SCAN_CHAN_MAX; chid++) {
chid             1690 drivers/net/wireless/marvell/mwifiex/scan.c 			if (priv->hidden_chan[chid].chan_number ==
chid             1694 drivers/net/wireless/marvell/mwifiex/scan.c 			if (!priv->hidden_chan[chid].chan_number) {
chid             1695 drivers/net/wireless/marvell/mwifiex/scan.c 				priv->hidden_chan[chid].chan_number =
chid             1697 drivers/net/wireless/marvell/mwifiex/scan.c 				priv->hidden_chan[chid].radio_type =
chid             1699 drivers/net/wireless/marvell/mwifiex/scan.c 				priv->hidden_chan[chid].scan_type =
chid              361 drivers/s390/cio/chp.c 		rc = sprintf(buf, "%04x\n", chp->desc_fmt1.chid);
chid              368 drivers/s390/cio/chp.c static DEVICE_ATTR(chid, 0444, chp_chid_show, NULL);
chid               33 drivers/s390/cio/chsc.h 	u16 chid;
chid              203 drivers/s390/net/ctcm_main.c 	char chid[CTCM_ID_SIZE+1];
chid              209 drivers/s390/net/ctcm_main.c 		strncpy(chid, ch->id, CTCM_ID_SIZE);
chid              240 drivers/s390/net/ctcm_main.c 			chid, ok ? "OK" : "failed");
chid              670 drivers/s390/net/qeth_core_mpc.h 	__u16 chid;
chid             1133 drivers/s390/net/qeth_l2_main.c 		snprintf(str[i], sizeof(str[i]), "NTOK_CHID=%04x", token->chid);
chid              639 drivers/soc/fsl/dpio/qbman-portal.c void qbman_pull_desc_set_channel(struct qbman_pull_desc *d, u32 chid,
chid              644 drivers/soc/fsl/dpio/qbman-portal.c 	d->dq_src = cpu_to_le32(chid);
chid              158 drivers/soc/fsl/dpio/qbman-portal.h void qbman_pull_desc_set_channel(struct qbman_pull_desc *d, u32 chid,
chid              651 drivers/staging/wlan-ng/hfa384x.h 	u16 chid;
chid              670 drivers/staging/wlan-ng/hfa384x.h 	u16 chid;
chid              686 drivers/staging/wlan-ng/hfa384x.h 	__le16 chid;
chid              493 drivers/staging/wlan-ng/prism2mgmt.c 	req->dschannel.data = le16_to_cpu(item->chid);
chid             1051 drivers/staging/wlan-ng/prism2sta.c 			 sr->result[i].chid,
chid             1058 drivers/staging/wlan-ng/prism2sta.c 	joinreq.channel = sr->result[0].chid;
chid             1145 drivers/staging/wlan-ng/prism2sta.c 		chan = result->chid - 1;
chid             1151 drivers/staging/wlan-ng/prism2sta.c 		chinforesult->chid = chan;
chid               96 drivers/staging/wusbcore/cbaf.c 	struct wusb_ckhdid chid;
chid              242 drivers/staging/wusbcore/cbaf.c 	hi->CHID = cbaf->chid;
chid              306 drivers/staging/wusbcore/cbaf.c 	return sprintf(buf, "%16ph\n", cbaf->chid.data);
chid              322 drivers/staging/wusbcore/cbaf.c 			&cbaf->chid.data[0] , &cbaf->chid.data[1],
chid              323 drivers/staging/wusbcore/cbaf.c 			&cbaf->chid.data[2] , &cbaf->chid.data[3],
chid              324 drivers/staging/wusbcore/cbaf.c 			&cbaf->chid.data[4] , &cbaf->chid.data[5],
chid              325 drivers/staging/wusbcore/cbaf.c 			&cbaf->chid.data[6] , &cbaf->chid.data[7],
chid              326 drivers/staging/wusbcore/cbaf.c 			&cbaf->chid.data[8] , &cbaf->chid.data[9],
chid              327 drivers/staging/wusbcore/cbaf.c 			&cbaf->chid.data[10], &cbaf->chid.data[11],
chid              328 drivers/staging/wusbcore/cbaf.c 			&cbaf->chid.data[12], &cbaf->chid.data[13],
chid              329 drivers/staging/wusbcore/cbaf.c 			&cbaf->chid.data[14], &cbaf->chid.data[15]);
chid              505 drivers/staging/wusbcore/cbaf.c 	ccd->CHID = cbaf->chid;
chid             1021 drivers/staging/wusbcore/devconnect.c 	hi->CHID              = wusbhc->chid;
chid              253 drivers/staging/wusbcore/mmc.c int wusbhc_chid_set(struct wusbhc *wusbhc, const struct wusb_ckhdid *chid)
chid              257 drivers/staging/wusbcore/mmc.c 	if (memcmp(chid, &wusb_ckhdid_zero, sizeof(*chid)) == 0)
chid              258 drivers/staging/wusbcore/mmc.c 		chid = NULL;
chid              261 drivers/staging/wusbcore/mmc.c 	if (chid) {
chid              266 drivers/staging/wusbcore/mmc.c 		wusbhc->chid = *chid;
chid              271 drivers/staging/wusbcore/mmc.c 	if ((chid) && (wusbhc->uwb_rc == NULL)) {
chid              288 drivers/staging/wusbcore/mmc.c 	if (chid)
chid               82 drivers/staging/wusbcore/wusbhc.c 	const struct wusb_ckhdid *chid;
chid               85 drivers/staging/wusbcore/wusbhc.c 		chid = &wusbhc->wuie_host_info->CHID;
chid               87 drivers/staging/wusbcore/wusbhc.c 		chid = &wusb_ckhdid_zero;
chid               89 drivers/staging/wusbcore/wusbhc.c 	return sprintf(buf, "%16ph\n", chid->data);
chid              105 drivers/staging/wusbcore/wusbhc.c 	struct wusb_ckhdid chid;
chid              113 drivers/staging/wusbcore/wusbhc.c 			&chid.data[0] , &chid.data[1] ,
chid              114 drivers/staging/wusbcore/wusbhc.c 			&chid.data[2] , &chid.data[3] ,
chid              115 drivers/staging/wusbcore/wusbhc.c 			&chid.data[4] , &chid.data[5] ,
chid              116 drivers/staging/wusbcore/wusbhc.c 			&chid.data[6] , &chid.data[7] ,
chid              117 drivers/staging/wusbcore/wusbhc.c 			&chid.data[8] , &chid.data[9] ,
chid              118 drivers/staging/wusbcore/wusbhc.c 			&chid.data[10], &chid.data[11],
chid              119 drivers/staging/wusbcore/wusbhc.c 			&chid.data[12], &chid.data[13],
chid              120 drivers/staging/wusbcore/wusbhc.c 			&chid.data[14], &chid.data[15]);
chid              126 drivers/staging/wusbcore/wusbhc.c 	result = wusbhc_chid_set(wusbhc, &chid);
chid              240 drivers/staging/wusbcore/wusbhc.h 	struct wusb_ckhdid chid;
chid              541 sound/pci/ca0106/ca0106_mixer.c #define CA_VOLUME(xname,chid,reg) \
chid              550 sound/pci/ca0106/ca0106_mixer.c 	.private_value = ((chid) << 8) | (reg)			\
chid              622 sound/pci/ca0106/ca0106_mixer.c #define I2C_VOLUME(xname,chid) \
chid              631 sound/pci/ca0106/ca0106_mixer.c 	.private_value = chid					\
chid              477 sound/pci/emu10k1/emumixer.c #define EMU1010_SOURCE_OUTPUT(xname,chid) \
chid              484 sound/pci/emu10k1/emumixer.c 	.private_value = chid					\
chid              538 sound/pci/emu10k1/emumixer.c #define EMU1010_SOURCE_INPUT(xname,chid) \
chid              545 sound/pci/emu10k1/emumixer.c 	.private_value = chid					\
chid              606 sound/pci/emu10k1/emumixer.c #define EMU1010_ADC_PADS(xname,chid) \
chid              613 sound/pci/emu10k1/emumixer.c 	.private_value = chid					\
chid              654 sound/pci/emu10k1/emumixer.c #define EMU1010_DAC_PADS(xname,chid) \
chid              661 sound/pci/emu10k1/emumixer.c 	.private_value = chid					\
chid             1041 sound/pci/emu10k1/emumixer.c #define I2C_VOLUME(xname,chid) \
chid             1050 sound/pci/emu10k1/emumixer.c 	.private_value = chid					\