CRTC_TEST_PATTERN_RAMP0_OFFSET  989 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c 				CRTC_TEST_PATTERN_RAMP0_OFFSET);
CRTC_TEST_PATTERN_RAMP0_OFFSET 1018 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c 				CRTC_TEST_PATTERN_RAMP0_OFFSET);
CRTC_TEST_PATTERN_RAMP0_OFFSET 1047 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c 				CRTC_TEST_PATTERN_RAMP0_OFFSET);
CRTC_TEST_PATTERN_RAMP0_OFFSET 1040 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c 					CRTC_TEST_PATTERN_RAMP0_OFFSET, 0);
CRTC_TEST_PATTERN_RAMP0_OFFSET 1050 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c 					CRTC_TEST_PATTERN_RAMP0_OFFSET, 0);
CRTC_TEST_PATTERN_RAMP0_OFFSET 1060 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c 					CRTC_TEST_PATTERN_RAMP0_OFFSET, 384 << 6);