CRTC_MASTER_EN    415 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c 		if (REG_GET_FIELD(tmp, CRTC_CONTROL, CRTC_MASTER_EN)) {
CRTC_MASTER_EN    486 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c 									 CRTC_CONTROL, CRTC_MASTER_EN);
CRTC_MASTER_EN    490 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c 				tmp = REG_SET_FIELD(tmp, CRTC_CONTROL, CRTC_MASTER_EN, 0);
CRTC_MASTER_EN    431 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c 		if (REG_GET_FIELD(tmp, CRTC_CONTROL, CRTC_MASTER_EN)) {
CRTC_MASTER_EN    512 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c 									 CRTC_CONTROL, CRTC_MASTER_EN);
CRTC_MASTER_EN    516 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c 				tmp = REG_SET_FIELD(tmp, CRTC_CONTROL, CRTC_MASTER_EN, 0);
CRTC_MASTER_EN    426 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c 									 CRTC_CONTROL, CRTC_MASTER_EN);
CRTC_MASTER_EN    430 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c 				tmp = REG_SET_FIELD(tmp, CRTC_CONTROL, CRTC_MASTER_EN, 0);
CRTC_MASTER_EN     74 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c 			CRTCV_MASTER_EN, CRTC_MASTER_EN);
CRTC_MASTER_EN     90 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c 				CRTCV_CONTROL, CRTC_MASTER_EN);