channel_reg       205 drivers/dma/tegra20-apb-dma.c 	struct tegra_dma_channel_regs	channel_reg;
channel_reg      1576 drivers/dma/tegra20-apb-dma.c 		struct tegra_dma_channel_regs *ch_reg = &tdc->channel_reg;
channel_reg      1614 drivers/dma/tegra20-apb-dma.c 		struct tegra_dma_channel_regs *ch_reg = &tdc->channel_reg;
channel_reg        41 drivers/gpu/ipu-v3/ipu-dmfc.c 	unsigned long	channel_reg;
channel_reg        50 drivers/gpu/ipu-v3/ipu-dmfc.c 		.channel_reg	= DMFC_DP_CHAN,
channel_reg        56 drivers/gpu/ipu-v3/ipu-dmfc.c 		.channel_reg	= DMFC_DP_CHAN,
channel_reg        62 drivers/gpu/ipu-v3/ipu-dmfc.c 		.channel_reg	= DMFC_DP_CHAN,
channel_reg        68 drivers/gpu/ipu-v3/ipu-dmfc.c 		.channel_reg	= DMFC_WR_CHAN,
channel_reg        74 drivers/gpu/ipu-v3/ipu-dmfc.c 		.channel_reg	= DMFC_DP_CHAN,